HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 768
![IC SUPERH MCU FLASH 256K 112QFP](/photos/12/21/122194/hd64f7144f50v_sml.jpg)
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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HD64F7144F50V
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Company:
Part Number:
HD64F7144F50V
Manufacturer:
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Quantity:
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Part Number:
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24. Power-Down Modes
24.2.1
SBYCR is an 8-bit readable/writable register that performs software standby mode control.
Bit
7
6
5
4 to 2 —
Rev.4.00 Mar. 27, 2008 Page 722 of 882
REJ09B0108-0400
Bit Name
SSBY
Hi-Z
—
Standby Control Register (SBYCR)
0
All 1
Initial Value
0
0
R/W
R/W
R/W
R
R
Description
Software Standby
This bit specifies the transition mode after executing
the SLEEP instruction.
0: Shifts to sleep mode after the SLEEP instruction
1: Shifts to software standby mode after the SLEEP
This bit cannot be set to 1 when the watchdog timer
(WDT) is operating (when the TME bit in TCSR of
the WDT is set to 1). When transferring to software
standby mode, clear the TME bit to 0, stop the WDT,
then set the SSBY bit to 1.
Port High-Impedance
In software standby mode, this bit selects whether
the pin state of the I/O port is retained or changed to
high-impedance.
0: In software standby mode, the pin state is retained.
1: In software standby mode, the pin state is changed
The HIZ bit cannot be set to 1 when the TME bit in
TCSR of the WDT is set to 1.
When changing the pin state of the I/O port to high-
impedance, clear the TME bit to 0, then set the HIZ
bit to 1.
Reserved
This bit is always read as 0, and should always be
written with 0.
Reserved
These bits are always read as 1, and should always
be written with 1.
has been executed
instruction has been executed
to high-impedance.
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