HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 843
![IC SUPERH MCU FLASH 256K 112QFP](/photos/12/21/122194/hd64f7144f50v_sml.jpg)
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS
Quantity:
450
Company:
Part Number:
HD64F7144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Item
Erase
Notes:
1. Make each time setting in accordance with the program/program-verify algorithm or erase/erase-
2. Programming time per 128 bytes (shows the total period for which the P-bit in the flash memory
3. 1-Block erase time (shows the total period for which the E-bit in FLMCR1 is set. It does not include
4. To specify the maximum programming time value (t
5. For the maximum erase time (t
6. See appendix C, Product Code Lineup for correspondence of the standard product, wide
7. All characteristics after rewriting are guaranteed up to this minimum rewriting times
8. Reference value at 25°C (A rough rewriting target number to which a rewriting usually functions)
9. Data retention characteristics when rewriting is executed within the specification values including
verify algorithm.
control register (FLMCR1) is set. It does not include the programming verification time.)
the erase verification time.)
algorithm, set the max. value (1000) for the maximum programming count (N).
The wait time after P bit setting should be changed as follows according to the value of the
programming counter (n).
Programming counter (n) = 1 to 6:
Programming counter (n) = 7 to 1000: t
[In additional programming]
Programming counter (n) = 1 to 6:
after E bit setting (t
To set the maximum erase time, the values of (t
formula.
Examples: When t
temperature-range product, and product model name.
(therefore 1 to min. times).
minimum values.
Wait time after SWE bit setting *
Wait time after ESU bit setting *
Wait time after E bit setting *
Wait time after E bit clear *
Wait time after ESU bit clear *
Wait time after EV bit setting *
Wait time after H'FF dummy write *
Wait time after EV bit clear *
Wait time after SWE bit clear *
Maximum erase count *
When t
t
E
(max) = Wait time after E bit setting (t
se
se
se
) and the maximum erase count (N):
= 100 ms, N = 12 times
= 10 ms, N = 120 times
1
*
5
1
1
E
1
*
(max)), the following relationship applies between the wait time
1
1
1
5
1
1
1
Symbol
t
t
t
t
t
t
t
t
t
N
t
sswe
sesu
se
ce
cesu
sev
sevr
cev
cswe
sp30
sp200
t
sp10
= 30 μs
= 200 μs
= 10 μs
se
) and (N) should be set so as to satisfy the above
Min
1
100
10
10
10
20
2
4
100
12
p
Rev.4.00 Mar. 27, 2008 Page 797 of 882
(max)) in the 128-bytes programming
se
) x maximum erase count (N)
Typ
1
100
10
10
10
20
2
4
100
⎯
26. Electrical Characteristics
Max
⎯
⎯
100
⎯
⎯
⎯
⎯
⎯
⎯
120
Unit
µs
µs
ms
µs
µs
µs
µs
µs
µs
Times
REJ09B0108-0400
Remarks
Erase time
wait
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