HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 249

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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10.4.6
Channel 2 has a source address reload function. This returns to the first value set in the source
address register (SAR_2) every four transfers by setting the RO bit of CHCR_2 to 1. Figure 10.24
illustrates this operation. Figure 10.25 is a timing chart for reload ON mode, with burst mode,
autorequest, 16-bit transfer data size, SAR_2 increment, and DAR_2 fixed mode.
address bus
data bus
Internal
Internal
CK
Transfer
request
Source Address Reload Function
SAR2
1st channel 2
SAR2 output
DAR2 output
Figure 10.25 Source Address Reload Function Timing Chart
transfer
DAR2
SAR2 data
Figure 10.24 Source Address Reload Function
DMAC
SAR2+2
SAR2+2 output
2nd channel 2
DAR2 output
DMAC control block
transfer
Reload control
4th count
After SAR2+6 output, SAR2 is reloaded
DAR2
SAR2+2 data
SAR2+4
SAR2+4 output
3rd channel 2
DAR2 output
transfer
DAR2
SAR2+4 data
10. Direct Memory Access Controller (DMAC)
SAR2+6
SAR2+6 output
4th channel 2
DAR2 output
Reload signal
Count signal
Rev.4.00 Mar. 27, 2008 Page 203 of 882
transfer
RO bit = 1
Reload
signal
DAR2
SAR2+6 data
Bus mastership is returned one time in four
(initial value)
DMATCR_2
CHCR_2
SAR_2
SAR_2
REJ09B0108-0400
SAR2
5th channel 2
SAR2 output
DAR2 output
transfer
SAR2 data
DAR2

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