HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 678
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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17. Pin Function Controller (PFC)
5. When the system uses the external space, the data I/O pins must be set as follows according to
6. If a power-on reset is input to the RES pin in the state where the pin is a general output pin and
Rev.4.00 Mar. 27, 2008 Page 632 of 882
REJ09B0108-0400
the bus sizes in the CS space set by the bus control register 1 (BCR1).
⎯ When the CS space is the byte size (8-bit size), set all pins, D7 to D0, as data I/O pins.
⎯ When the CS space is the word size (16-bit size), set all pins, D15 to D0, as data I/O pins.
⎯ When the CS space is the longword size (32-bit size), set all pins, D31 to D0, as data I/O
set to output 1 (that is, the port control register is in the general I/O state, port I/O register is 1,
and port data register is 1), a low level may occur in the pin at a power-on reset input. To avoid
this low level from occurring, input a power-on reset after clearing the port I/O register to 0
(general input). The low level above will not occur when an internal power-on reset is input
due to a WDT overflow.
pins.
If the contents in the external space are read by settings other than above ways, no correct
data can be latched. This note applies to entire space, CS0 to CS7.
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