HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 751
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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23.1
This LSI has an on-chip advanced user debugger (AUD). Use of the AUD simplifies the
construction of a simple emulator, with functions such as acquisition of branch trace data and
monitoring/tuning of on-chip RAM data.
AUD can be enabled or disabled using the AUDSRST bit in the system control register (SYSCR).
Refer to section 24.2.2, System Control Register (SYSCR), for SYSCR.
23.1.1
The AUD has the following features:
• Eight input/output pins
• Two modes
AUD0001A_020020030800
⎯ Data bus (AUDATA3-AUDATA0)
⎯ AUD reset (AUDRST)
⎯ AUD sync signal (AUDSYNC)
⎯ AUD clock (AUDCK)
⎯ AUD mode (AUDMD)
⎯ Branch trace mode
⎯ RAM monitor mode
Overview
Features
Section 23 Advanced User Debugger (AUD)
Rev.4.00 Mar. 27, 2008 Page 705 of 882
23. Advanced User Debugger (AUD)
REJ09B0108-0400
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