LPC2925FBD100,551 NXP Semiconductors, LPC2925FBD100,551 Datasheet - Page 4

• Manufacturer Part Number: LPC2925FBD100,551
• Description: IC ARM9 MCU FLASH 512KB 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2900r

Specifications of LPC2925FBD100,551

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 125MHz
• Connectivity: CAN, I²C, LIN, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16K x 8
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 16x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC29
• Core: ARM968E-S
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935287116551

NXP Semiconductors
4. Block diagram
LPC2921_23_25_3
Product data sheet
Fig 1.
TIMER0/1 MTMR
LPC2921/2923/2925
ACCEPTANCE
QUADRATURE
MANAGEMENT
UART/LIN0/1
3.3 V ADC1/2
PWM0/1/2/3
Grey-shaded blocks represent peripherals and memory regions accessible by the GPDMA.
LPC2921/2923/2925 block diagram
GENERATION
GENERATION
ENCODER
GLOBAL
FILTER
POWER
CAN0/1
I
CLOCK
RESET
2
UNIT
UNIT
UNIT
C0/1
CONTROLLER
INTERRUPT
VECTORED
networking subsystem
power, clock, and
reset subsystem
MSC subsystem
AHB TO DTL
AHB TO DTL
AHB TO APB
AHB TO APB
BRIDGE
BRIDGE
BRIDGE
BRIDGE
All information provided in this document is subject to legal disclaimers.
1 master
2 slaves
ITCM
16 kB
slave
slave
slave
slave
Rev. 03 — 14 April 2010
TEST/DEBUG
ARM968E-S
INTERFACE
8 kB SRAM
interface
JTAG
MATRIX
MULTI-
LAYER
AHB
master
master
master
slave
slave
slave
slave
slave
slave
slave
DTCM
16 kB
ARM9 microcontroller with CAN, LIN, and USB
peripheral subsystem
general subsystem
EMBEDDED SRAM 16 kB
EMBEDDED SRAM 16 kB
AHB TO APB
AHB TO APB
GPDMA CONTROLLER
GPDMA REGISTERS
EMBEDDED FLASH
BRIDGE
BRIDGE
(LPC2925 only)
512/256/128 kB
CONTROLLER
USB DEVICE
LPC2921/2923/2925
GENERAL PURPOSE I/O
SYSTEM CONTROL
CHIP FEATURE ID
EVENT ROUTER
EEPROM
16 kB
RS-485 UART0/1
TIMER 0/1/2/3
PORTS 0/1/5
SPI0/1/2
© NXP B.V. 2010. All rights reserved.
WDT
002aae224
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