LPC2925FBD100,551 NXP Semiconductors, LPC2925FBD100,551 Datasheet - Page 52

IC ARM9 MCU FLASH 512KB 100-LQFP

LPC2925FBD100,551

Manufacturer Part Number
LPC2925FBD100,551
Description
IC ARM9 MCU FLASH 512KB 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2900r
Datasheet

Specifications of LPC2925FBD100,551

Core Processor
ARM9
Core Size
32-Bit
Speed
125MHz
Connectivity
CAN, I²C, LIN, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
16K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 16x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC29
Core
ARM968E-S
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935287116551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2925FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2921_23_25_3
Product data sheet
6.16.2 Clock description
Interrupt-request masking is performed individually per interrupt target by comparing the
priority level assigned to a specific interrupt request with a target-specific priority
threshold. The priority levels are defined as follows:
Software interrupt support is provided and can be supplied for:
The VIC is clocked by CLK_SYS_VIC, see
Priority level 0 corresponds to ‘masked’ (i.e. interrupt requests with priority 0 never
lead to an interrupt).
Priority 1 corresponds to the lowest priority.
Priority 15 corresponds to the highest priority.
Testing RTOS (Real-Time Operating System) interrupt handling without using
device-specific interrupt service routines.
Software emulation of an interrupt-requesting device, including interrupts.
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 14 April 2010
ARM9 microcontroller with CAN, LIN, and USB
Section
LPC2921/2923/2925
6.7.2.
© NXP B.V. 2010. All rights reserved.
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