HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 127
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 127 of 980
- Download datasheet (6Mb)
Table 3.5
Using the repeat macros shown in table 3.5, examples 1 to 4 shown above can be simplified to
examples 5 to 8 as shown below.
• Example 5: Repeat loop consisting of 4 or more instructions (extended to the instruction
• Example 6: Repeat loop consisting of three instructions (extended to the instruction stream
Instruction
REPEAT RptStart, RptEnd, #imm Specifies RptStart as repeat start instruction,
REPEAT RptStart, RptEnd, Rm
RptStart: instr1
RptEnd:
RptStart: instr1
RptEnd:
stream shown in example 1, above)
shown in example 2, above)
Repeat Control Macros
REPEAT RptStart, RptEnd, #4
Instr0
... ...
... ...
instr(N-3)
instr(N-2)
instr(N-1)
instrN
REPEAT RptStart, RptEnd, #4
instr0
Instr2
instr3
Operation
RptEnd as repeat end instruction, and 8-bit
immediate data #imm as number of repetitions.
This macro is extended to three instructions:
LDRS, LDRE, and SETRC which are converted
correctly.
Specifies RptStart as repeat start instruction,
RptEnd as repeat end instruction, and the [11:0]
bits of Rm as number of repetitions. This macro
is extended to three instructions: LDRS, LDRE,
and SETRC which are converted correctly.
;
; [Repeat start instruction]
;
;
;
;
;
;[Repeat end instruction]
;
; [Repeat start instruction]
;
; [Repeat end instruction]
Rev. 1.00 Dec. 27, 2005 Page 83 of 1044
Section 3 DSP Operating Unit
REJ09B0269-0100
Number of
Execution
States
3
3
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