HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 585
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 585 of 980
- Download datasheet (6Mb)
16.3.6
SCSCR performs enabling or disabling of the SCIF transfer operations and interrupt requests, and
selection of the serial clock source.
SCSCR can be read or written to by the CPU at all times.
SCSCR is initialized to H'0000 by a power-on reset or manual reset. It is not initialized in standby
mode or in the module standby state, and retains its contents.
Bit
15 to 8
7
Serial Control Register (SCSCR)
Bit Name
TIE
Initial
Value
All 0
0
R/W
R
R/W
Section 16 Serial Communication Interface with FIFO (SCIF)
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Transmit Interrupt Enable
Enables or disables generation of a transmit-FIFO-
data-empty interrupt (TXI) request when the TDFE
flag in SCFSR is set to 1 after the serial transmit data
is transferred from SCFTDR to SCTSR and the
number of data bytes in the transmit FIFO register is
equal to or below the trigger set number.
0: Transmit-FIFO-data-empty interrupt (TXI) request
1: Transmit-FIFO-data-empty interrupt (TXI) request
Note: * TXI interrupt requests can be cleared by
disabled*
enabled
writing transmit data exceeding the transmit
trigger set number to SCFTDR, reading 1
from the TDFE flag, then clearing it to 0, or
by clearing the TIE bit to 0.
Rev. 1.00 Dec. 27, 2005 Page 541 of 932
REJ09B0269-0100
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