HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 449

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 12.13 Relationship between A2/3BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and
Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the
A2/3
BSZ
[1:0]
11 (32 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
2. Bank address specification
access mode.
256-Mbit product (2 Mwords x 32 bits x 4 banks, column 9 bits product): 1
128-Mbit product (2 Mwords x 16 bits x 4 banks, column 9 bits product): 2
Address Multiplex Output (2)-1
A2/3
ROW
[1:0]
01 (12 bits)
Row Address
Output
A26
A25
A24*
A23*
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
2
2
Setting
A2/3
COL
[1:0]
01 (9 bits)
Column Address
Output
A17
A16
A24*
A23*
A13
L/H*
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Example of connected memory
1
2
2
Synchronous
DRAM Pin
A13 (BA1)
A12 (BA0)
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Rev. 1.00 Dec. 27, 2005 Page 405 of 932
Section 12 Bus State Controller (BSC)
Function
Unused
Specifies bank
Address
Specifies
address/precharge
Address
Unused
REJ09B0269-0100

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