HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 743

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.3.45 CAM Entry Table 0 to 31 L Registers (TSU_ADRL0 to TSU_ADRL31)
TSU_ADRL0 to TSU_ADRL31 are entry tables referred by the CAM in reception and relay. This
register sets the lower 16 bits of the 48-bit MAC address. Maximum 32 entries of MAC addresses
can be registered. To refer to input signals on the CAMSEN0 and CAMSEN 1 pins, do not set the
same MAC address set by this register to the entry tables of the external CAM.
Notes: Set the CAM entry table as follows:
18.3.46 Transmit Frame Counter Register (Port 0) (Normal Transmission Only)
TXNLCR0 is a 32-bit counter indicating the number of frames successfully transmitted in MAC-
0. When the value in this register reaches H'FFFFFFFF, the count is halted. The counter value is
cleared to 0 by a read to this register. This register cannot be written.
Bit
31 to 16 
15 to 0
Bit
31 to 0 NTC031 to
1. Check that the ADSBSY bit in TSU_ADSBSY is cleared to 0.
2. Set the upper 32 bits of the MAC address by TSU_ADRH0 to TSU_ADRH31.
3. Set the lower 16 bits of the MAC address by TSU_ADRL0 to TSU_ADRL31.
Bit Name
NTC000
Bit Name
ADRLn15 to
ADRLn0
(n: 0 to 31)
(TXNLCR0)
Initial Value R/W
All 0
Initial
Value
All 0
All 0
R/W
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
MAC Address Bit
These bits set the lower 16 bits of the MAC address.
When the MAC address is 01-23-45-67-89-AB
(displayed in hexadecimal), H′000089AB is set to this
register.
Description
Port 0 Transmit Frame Counter Bit
These bits indicate the number of frames
successfully transmitted.
Rev. 1.00 Dec. 27, 2005 Page 699 of 932
Section 18 Ethernet Controller (EtherC)
REJ09B0269-0100

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