HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 344
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 344 of 980
- Download datasheet (6Mb)
Section 10 Power-Down Modes
10.2.2
STBCR2 is an 8-bit readable/writable register that controls the operation of modules in the power-
down mode. This register is initialized to H′00 at power-on reset but retains the previous value
after manual reset.
Rev. 1.00 Dec. 27, 2005 Page 300 of 932
REJ09B0269-0100
Bit
7
6
5
4
3
Standby Control Register 2 (STBCR2)
Bit Name
MSTP10
MSTP9
MSTP8
MSTP7
MSTP6
Initial Value R/W
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Module Stop Bit 10
When the MSTP10 bit is set to 1, the supply of the
clock to the H-UDI is halted.
0: H-UDI runs
1: Clock supply to H-UDI halted
Module Stop Bit 9
When the MSTP9 bit is set to 1, the supply of the
clock to the UBC is halted.
0: UBC runs
1: Clock supply to UBC halted
Module Stop Bit 8
When the MSTP8 bit is set to 1, the supply of the
clock to the DMAC is halted.
0: DMAC runs
1: Clock supply to DMAC halted
Module Stop Bit 7
When the MSTP7 bit is set to 1, the supply of the
clock to the DSP is halted.
0: DSP runs
1: Clock supply to DSP halted
Module Stop Bit 6
When the MSTP6 bit is set to 1, the supply of the
clock to the TLB is halted.
0: TLB runs
1: Clock supply to TLB halted
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