UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 122

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
120
Caution When using the high-speed system clock oscillator and subsystem clock oscillator, wire as
Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Also, insert
Figure 5-10 shows examples of incorrect resonator connection.
follows in the area enclosed by the broken lines in the Figures 5-8 and 5-9 to avoid an adverse
effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not fetch signals from the oscillator.
Note that the subsystem clock oscillator is designed as a low-amplitude circuit for reducing
power consumption.
resistors in series on the XT2 side.
ground the capacitor to a ground pattern through which a high current flows.
(a) Too long wiring
V
Figure 5-10. Examples of Incorrect Resonator Connection (1/2)
SS
X1
CHAPTER 5 CLOCK GENERATOR
X2
User’s Manual U16899EJ3V0UD
V
SS
(b) Crossed signal line
X1
PORT
X2
SS
. Do not

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