UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 281

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.4.2 Asynchronous serial interface (UART) mode
baud rates.
(1) Registers used
POWER0
In this mode, 1-byte data is transmitted/received following a start bit, and a full-duplex operation can be performed.
A dedicated UART baud rate generator is incorporated, so that communication can be executed at a wide range of
Note Can be set as port function.
Remark ×:
0
1
The basic procedure of setting an operation in the UART mode is as follows.
<1> Set the BRGC0 register (see Figure 13-4).
<2> Set bits 1 to 4 (SL0, CL0, PS00, and PS01) of the ASIM0 register (see Figure 13-2).
<3> Set bit 7 (POWER0) of the ASIM0 register to 1.
<4> Set bit 6 (TXE0) of the ASIM0 register to 1.
<5> Write data to the TXS0 register.
Caution Take relationship with the other party of communication when setting the port mode register
The relationship between the register settings and pins is shown below.
Asynchronous serial interface reception error status register 0 (ASIS0)
Asynchronous serial interface operation mode register 0 (ASIM0)
Baud rate generator control register 0 (BRGC0)
Port mode register 1 (PM1)
Port register 1 (P1)
Set bit 5 (RXE0) of the ASIM0 register to 1.
TXE0
POWER0: Bit 7 of asynchronous serial interface operation mode register 0 (ASIM0)
TXE0:
RXE0:
PM1×:
P1×:
0
0
1
1
and port register.
RXE0
0
1
0
1
Bit 5 of ASIM0
Port mode register
don’t care
Bit 6 of ASIM0
Port output latch
Table 13-2. Relationship Between Register Settings and Pins
PM10
×
×
Note
Note
0
0
CHAPTER 13 SERIAL INTERFACE UART0
×
×
P10
Note
Note
1
1
Data transmission is started.
User’s Manual U16899EJ3V0UD
PM11
×
×
Note
Note
1
1
Transmission is enabled.
Reception is enabled.
×
×
P11
Note
Note
×
×
Transmission/
Transmission
Operation
Reception
reception
UART0
Stop
TxD0/SCK10/P10
SCK10/P10
SCK10/P10
TxD0
TxD0
Pin Function
RxD0/SI10/P11
SI10/P11
SI10/P11
RxD0
RxD0
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