UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 257

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(4) Power-fail comparison mode register (PFM)
(5) Power-fail comparison threshold register (PFT)
Caution If data is written to PFM, a wait cycle is generated. Do not write data to PFM when the CPU is
Caution If data is written to PFT, a wait cycle is generated. Do not write data to PFT when the CPU is
The power-fail comparison mode register (PFM) is used to compare the A/D conversion result (value of the
ADCR register) and the value of the power-fail comparison threshold register (PFT).
PFM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
The power-fail comparison threshold register (PFT) is a register that sets the threshold value when comparing the
values with the A/D conversion result.
8-bit data in PFT is compared to the higher 8 bits (FF09H) of the 10-bit A/D conversion result.
PFT can be set by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
operating on the subsystem clock and the high-speed system clock is stopped. For details, see
CHAPTER 33 CAUTIONS FOR WAIT.
operating on the subsystem clock and the high-speed system clock is stopped. For details, see
CHAPTER 33 CAUTIONS FOR WAIT.
Figure 12-8. Format of Power-Fail Comparison Threshold Register (PFT)
Address: FF2AH
Symbol
Address: FF2BH
Symbol
Figure 12-7. Format of Power-Fail Comparison Mode Register (PFM)
PFM
PFT
PFEN
PFEN
PFT7
<7>
0
1
0
1
7
Stops power-fail comparison (used as a normal A/D converter)
Enables power-fail comparison (used for power-fail detection)
Higher 8 bits of
ADCR
Higher 8 bits of
ADCR < PFT
Higher 8 bits of
ADCR
Higher 8 bits of
ADCR < PFT
PFCM
PFCM
After reset: 00H
After reset: 00H
PFT6
<6>
6
CHAPTER 12 A/D CONVERTER
PFT
PFT
User’s Manual U16899EJ3V0UD
PFT5
5
0
5
Power-fail comparison enable
Interrupt request signal (INTAD) generation
No INTAD generation
No INTAD generation
INTAD generation
PFT4
R/W
R/W
4
0
4
Power-fail comparison mode selection
PFT3
3
0
3
PFT2
2
0
2
PFT1
1
0
1
PFT0
0
0
0
255