UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 389
UPD78F0138HGK-9ET-A
Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet
1.UPD78F0138HGK-9ET-A.pdf
(568 pages)
Specifications of UPD78F0138HGK-9ET-A
Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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19.2.2 STOP mode
(1) STOP mode setting and operating statuses
Notes 1.
Item
System clock
CPU
Port (latch)
16-bit timer/event counter 00
16-bit timer/event counter 01
8-bit timer/event counter 50
8-bit timer/event counter 51
8-bit timer H0
8-bit timer H1
Watch timer
Watch-
dog
timer
A/D converter
Serial interface
Clock monitor
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
The STOP mode is set by executing the STOP instruction, and it can be set when the CPU clock before the
setting was the high-speed system clock or internal oscillation clock.
Caution Because the interrupt request signal is used to release the standby mode, if there is an
The operating statuses in the STOP mode are shown below.
2.
3.
4.
5.
Internal oscillator
cannot be stopped
Internal oscillator can
be stopped
STOP Mode Setting
When “Stopped by software” is selected for internal oscillator by the option byte and internal oscillator is
stopped by software (for option bytes, see CHAPTER 24 OPTION BYTE).
Operable only when f
Operable when the subsystem clock is selected.
“Internal oscillator cannot be stopped” or “internal oscillator can be stopped by software” can be selected
by the option byte.
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD only.
interrupt source with the interrupt request flag set and the interrupt mask flag reset, the
standby mode is immediately released if set. Thus, the STOP mode is reset to the HALT mode
immediately after execution of the STOP instruction and the system returns to the operating
mode as soon as the wait time set using the oscillation stabilization time select register (OSTS)
has elapsed.
UART0
UART6
CSI10
CSI11
Note 5
Note 2
Note 2
Note 5
When Subsystem
Only high-speed system clock oscillator oscillation is stopped. Clock supply to the CPU is stopped.
Operation stopped
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Operable only when TI50 is selected as the count clock
Operable only when TI51 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event counter 50 operation
Operable
Operable
Operable
Operation stopped
Operation stopped
Operable only when TM50 output is selected as the serial clock during TM50 operation
Operable only when external SCK10 is selected as the serial clock
Operable only when external SCK11 is selected as the serial clock
Operation stopped
Operation stopped
Operable
Operable
Operable
When STOP Instruction Is Executed While CPU Is Operating on High-Speed
Clock Used
R
Table 19-4. Operating Statuses in STOP Mode
When Internal Oscillator
/2
Oscillation Continues
7
Note 3
Note 4
is selected as the count clock.
CHAPTER 19 STANDBY FUNCTION
When Subsystem
Operation stopped Operable
Clock Not Used
User’s Manual U16899EJ3V0UD
System Clock
When Subsystem
Operation stopped
Clock Used
When Internal Oscillator
Oscillation Stopped
Note 4
When Subsystem
Operation stopped Operable
Clock Not Used
Note 1
When Subsystem
When STOP Instruction Is Executed
Operable
Operable
While CPU Is Operating on Internal
Clock Used
Note 3
Note 4
Oscillation Clock
When Subsystem
Operation stopped
Clock Not Used
387
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