UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 552

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

550
A/D
converter
Function
Noise
countermeasures
ANI0/P20 to
ANI7/P27
Input
impedance of
ANI0 to ANI7
pins
AV
impedance
Interrupt
request flag
(ADIF)
Conversion
result just after
A/D conversion
start
A/D conversion
result register
(ADCR) read
operation
A/D converter
sampling time
and A/D
conversion start
delay time
REF
Details of
Function
pin input
To maintain the 10-bit resolution, attention must be paid to noise input to the
AV
Because the effect increases in proportion to the output impedance of the analog
input source, it is recommended that a capacitor be connected externally, as
shown in Figure 12-19, to reduce noise.
The analog input pins (ANI0 to ANI7) are also used as input port pins (P20 to
P27).
When A/D conversion is performed with any of ANI0 to ANI7 selected, do not
access port 2 while conversion is in progress; otherwise the conversion resolution
may be degraded.
If a digital pulse is applied to the pins adjacent to the pins currently used for A/D
conversion, the expected value of the A/D conversion may not be obtained due to
coupling noise. Therefore, do not apply a pulse to the pins adjacent to the pin
undergoing A/D conversion.
In this A/D converter, the internal sampling capacitor is charged and sampling is
performed for approx. one sixth of the conversion time.
Since only the leakage current flows other than during sampling and the current
for charging the capacitor also flows during sampling, the input impedance
fluctuates and has no meaning.
To perform sufficient sampling, however, it is recommended to make the output
impedance of the analog input source 10 k
around 100 pF to the ANI0 to ANI7 pins (see Figure 12-19).
A series resistor string of several tens of k
AV
Therefore, if the output impedance of the reference voltage source is high, this
will result in a series connection to the series resistor string between the AV
and AV
The interrupt request flag (ADIF) is not cleared even if the analog input channel
specification register (ADS) is changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D
conversion result and ADIF for the pre-change analog input may be set just
before the ADS rewrite. Caution is therefore required since, at this time, when
ADIF is read immediately after the ADS rewrite, ADIF is set despite the fact A/D
conversion for the post-change analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D
conversion operation is resumed.
The A/D conversion value immediately after A/D conversion starts may not fall
within the rating range if the ADCS bit is set to 1 within 14 s after the ADCE bit
was set to 1, or if the ADCS bit is set to 1 with the ADCE bit = 0. Take measures
such as polling the A/D conversion end interrupt request (INTAD) and removing
the first conversion result.
When a write operation is performed to the A/D converter mode register (ADM)
and analog input channel specification register (ADS), the contents of ADCR may
become undefined. Read the conversion result following conversion completion
before writing to ADM and ADS. Using a timing other than the above may cause
an incorrect conversion result to be read.
The A/D converter sampling time differs depending on the set value of the A/D
converter mode register (ADM).
The delay time exists until actual sampling is started after A/D converter
operation is enabled.
When using a set in which the A/D conversion time must be strictly observed,
care is required for the contents shown in Figure 12-21 and Table 12-3.
REF
SS
pins.
pin and pins ANI0 to ANI7.
SS
APPENDIX D LIST OF CAUTIONS
pins, resulting in a large reference voltage error.
User’s Manual U16899EJ3V0UD
Cautions
is connected between the AV
or lower, or connect a capacitor of
REF
REF
and
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p. 265
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p. 266
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