UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 165
UPD78F0138HGK-9ET-A
Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet
1.UPD78F0138HGK-9ET-A.pdf
(568 pages)
Specifications of UPD78F0138HGK-9ET-A
Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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(2) Measurement of two pulse widths with free-running counter
Figure 6-25. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 0n (TM0n) is operated in free-running mode, it is possible to simultaneously measure
the pulse widths of the two signals input to the TI00n pin and the TI01n pin.
When the edge specified by bits 4 and 5 (ES0n0 and ES0n1) of prescaler mode register 0n (PRM0n) is input to
the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register 01n (CR01n) and an interrupt
request signal (INTTM01n) is set.
Also, when the edge specified by bits 6 and 7 (ES1n0 and ES1n1) of PRM0n is input to the TI01n pin, the value
of TM0n is taken into 16-bit timer capture/compare register 00n (CR00n) and an interrupt request signal
(INTTM00n) is set.
Specify both the rising and falling edges as the edges of the TI00n and TI01n pins, by using bits 4 and 5 (ES0n0
and ES0n1) and bits 6 and 7 (ES1n0 and ES1n1) of PRM0n.
Sampling is performed using the count clock cycle selected by prescaler mode register 0n (PRM0n), and a
capture operation is only performed when a valid level of the TI00n or TI01n pin is detected twice, thus
eliminating noise with a short pulse width.
PRM0n
TMC0n
CRC0n
ES1n1
n = 0:
n = 0, 1: PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
7
0
7
0
1
See the description of the respective control registers for details.
ES1n0
6
0
6
0
1
PD78F0132H
ES0n1
5
0
5
0
1
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
ES0n0
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
4
0
4
0
1
(c) Prescaler mode register 0n (PRM0n)
TMC0n3
0
3
0
3
0
TMC0n2
CRC0n2
User’s Manual U16899EJ3V0UD
1
1
2
0
TMC0n1
CRC0n1
PRM0n1
0/1
0/1
0
CRC0n0
OVF0n
PRM0n0
0/1
0
1
Free-running mode
CR00n used as capture register
Captures valid edge of TI01n pin to CR00n.
CR01n used as capture register
Selects count clock (setting “11” is prohibited).
Specifies both edges for pulse width detection.
Specifies both edges for pulse width detection.
163
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