C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 150

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F320/1
15.4. USB Clock Configuration
USB0 is capable of communication as a Full or Low Speed USB function. Communication speed is selected via the
SPEED bit in SFR USB0XCN. When operating as a Low Speed function, the USB0 clock must be 6 MHz. When
operating as a Full Speed function, the USB0 clock must be 48 MHz. Clock options are described in
“13. Oscillators” on page
Clock Recovery circuitry uses the incoming USB data stream to adjust the internal oscillator; this allows the internal
oscillator (and 4x Clock Multiplier) to meet the requirements for USB clock tolerance. Clock Recovery should be
used in the following configurations:
When operating USB0 as a Low Speed function with Clock Recovery, software must write ‘1’ to the CRLOW bit to
enable Low Speed Clock Recovery. Clock Recovery is typically not necessary in Low Speed mode.
Single Step Mode can be used to help the Clock Recovery circuitry to lock when high noise levels are present on the
USB network. This mode is not required (or recommended) in typical USB environments.
150
Communication Speed
Full Speed
Low Speed
Bit7:
Bit6:
Bit5:
Bits4-0:
CRE
R/W
Bit7
CRE: Clock Recovery Enable.
This bit enables/disables the USB clock recovery feature.
0: Clock recovery disabled.
1: Clock recovery enabled.
CRSSEN: Clock Recovery Single Step.
This bit forces the oscillator calibration into ‘single-step’ mode during clock recovery.
0: Normal calibration mode.
1: Single step mode.
CRLOW: Low Speed Clock Recovery Mode.
This bit must be set to ‘1’ if clock recovery is used when operating as a Low Speed USB device.
0: Full Speed Mode.
1: Low Speed Mode.
Reserved. Read = Variable. Must Write = 1001b.
CRSSEN
Figure 15.7. CLKREC: Clock Recovery Control (USB Register)
R/W
Bit6
117. The USB0 clock is selected via SFR CLKSEL (see Figure 13.6 on Page 125).
CRLOW
USB Clock
4x Clock Multiplier
Internal Oscillator / 2
R/W
Bit5
R/W
Bit4
Rev. 1.1
R/W
Bit3
Internal Oscillator
4x Clock Multiplier Input
N/A
Reserved
R/W
Bit2
R/W
Bit1
R/W
Bit0
USB Address:
00001001
Reset Value
0x0F
Section

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