C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 227

• Manufacturer Part Number: C8051F320
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F320

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

19.2.3. USB Start-of-Frame Capture
When T2SOF = ‘1’, Timer 2 operates in USB Start-of-Frame (SOF) capture mode. When T2SPLIT = ‘0’, Timer 2
counts up and overflows from 0xFFFF to 0x0000. Each time a USB SOF is received, the contents of the Timer 2 reg-
isters (TMR2H:TMR2L) are latched into the Timer 2 Reload registers (TMR2RLH:TMR2RLL). A Timer 2 interrupt
is generated if enabled. This mode can be used to calibrate the system clock or external oscillator against the known
USB host SOF clock.
When T2SPLIT = ‘1’, the Timer 2 registers (TMR2H and TMR2L) act as two 8-bit counters. Each counter counts up
independently and overflows from 0xFF to 0x00. Each time a USB SOF is received, the contents of the Timer 2 reg-
isters are latched into the Timer 2 Reload registers (TMR2RLH and TMR2RLL). A Timer 2 interrupt is generated if
enabled.
External Clock / 8
SYSCLK / 12
External Clock / 8
H
T
F
2
T
F
2
L
SYSCLK / 12
TMR2CN
T
F
2
L
E
N
S
O
SYSCLK
T
2
F
Figure 19.13. Timer 2 SOF Capture Mode (T2SPLIT = ‘0’)
Figure 19.14. Timer 2 SOF Capture Mode (T2SPLIT = ‘1’)
T
S
P
T
2
L
I
H
R
T
F
2
T
2
T
F
2
L
TMR2CN
E
N
T
X
C
K
T
F
2
L
2
L
0
1
T
S
O
F
2
T
S
P
T
2
L
I
T
R
2
SYSCLK
C
T
2
X
L
K
0
1
M
H
T
3
M
T
3
L
Start-of-Frame
CKCON
T
M
H
2
0
1
1
0
M
T
0
1
2
L
M
H
T
3
(SOF)
USB
M
T
1
M
T
3
L
M
CKCON
T
0
M
T
H
2
S
C
A
1
M
T
2
L
C
S
A
0
M
T
1
M
T
0
TR2
TR2
S
C
A
1
S
C
A
0
Enable
Rev. 1.1
Capture
TCLK
TCLK
TCLK
Overflow
TMR2RLH
TMR2RLL
TL2
TMR2H
TMR2RLL TMR2RLH
TMR2L
TMR2L
Interrupt
Capture
Capture
To SMBus
TMR2H
To SMBus
To ADC,
SMBus
C8051F320/1
Start-of-Frame
(SOF)
Enable
USB
To ADC,
SMBus
Interrupt
227