C8051F320 Silicon Laboratories Inc, C8051F320 Datasheet - Page 226

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C8051F320

Manufacturer Part Number
C8051F320
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F320

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F320/1
19.2.2. 8-bit Timers with Auto-Reload
When T2SPLIT = ‘1’ and T2SOF = ‘0’, Timer 2 operates as two 8-bit timers (TMR2H and TMR2L). Both 8-bit tim-
ers operate in auto-reload mode as shown in Figure 19.12. TMR2RLL holds the reload value for TMR2L;
TMR2RLH holds the reload value for TMR2H. The TR2 bit in TMR2CN handles the run control for TMR2H.
TMR2L is always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock source
divided by 8. The Timer 2 Clock Select bits (T2MH and T2ML in CKCON) select either SYSCLK or the clock
defined by the Timer 2 External Clock Select bit (T2XCLK in TMR2CN), as follows:
The TF2H bit is set when TMR2H overflows from 0xFF to 0x00; the TF2L bit is set when TMR2L overflows from
0xFF to 0x00. When Timer 2 interrupts are enabled (IE.5), an interrupt is generated each time TMR2H overflows. If
Timer 2 interrupts are enabled and TF2LEN (TMR2CN.5) is set, an interrupt is generated each time either TMR2L or
TMR2H overflows. When TF2LEN is enabled, software must check the TF2H and TF2L flags to determine the
source of the Timer 2 interrupt. The TF2H and TF2L interrupt flags are not cleared by hardware and must be manu-
ally cleared by software.
226
External Clock / 8
T2MH
SYSCLK / 12
0
0
1
T2XCLK
T2XCLK
X
0
1
0
1
Figure 19.12. Timer 2 8-Bit Mode Block Diagram
SYSCLK
TMR2H Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
0
1
1
0
M
T
3
H
M
T
3
L
CKCON
M
H
T
2
M
T
2
L
M
T
1
M
T
0
TR2
S
C
A
1
C
S
A
0
Rev. 1.1
TCLK
TCLK
TMR2RLH
TMR2RLL
TMR2H
TMR2L
T2ML
0
0
1
Reload
Reload
T2XCLK
X
0
1
To SMBus
To ADC,
T2SPLIT
TF2LEN
T2XCLK
SMBus
T2SOF
TF2H
TF2L
TR2
TMR2L Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
Interrupt

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