TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 126

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

7.6
Exception / Interrupt-Related Registers
31-30
29
28-7
6-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
7.6.2.22
Bit
−
TBLBASE
TBLOFF
−
Bit Symbol
TBLOFF
Vector Table Offset Register
31
23
15
0
0
0
7
0
-
R
R/W
R/W
R
Type
30
22
14
0
0
0
6
0
-
-
Read as 0,
Table base
The vector table is in:
0: Code space
1: SRAM space
Offset value
Set the offset value from the top of the space specified in TBLBASE.
The offset must be aligned based on the number of exceptions in the table.This means that the minimum
alignment is 32 words that you can use for up to 16 interrupts.For more interrupts, you must adjust the align-
ment by rounding up to the next power of two.
Read as 0,
TBLBASE
29
21
13
0
0
0
5
0
-
Page 102
28
20
12
0
0
0
4
0
-
TBLOFF
TBLOFF
27
19
11
Function
0
0
0
3
0
-
TBLOFF
26
18
10
0
0
0
2
0
-
25
17
0
0
9
0
1
0
-
TMPM362F10FG
24
16
0
0
8
0
0
0
-