ispPAC-CLK5620AV-01TN100I Lattice, ispPAC-CLK5620AV-01TN100I Datasheet - Page 16

• Manufacturer Part Number: ispPAC-CLK5620AV-01TN100I
• Description: Clock Drivers & Distribution ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I
• Manufacturer: Lattice

Specifications of ispPAC-CLK5620AV-01TN100I

• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Typical Performance Characteristics
1.2
0.8
0.6
0.4
0.2
25
20
15
10
50
40
30
20
10
0
5
0
1
0
320
*PFD = Phase/Frequency Detector
300
0
370
Cycle-Cycle Jitter vs. VCO Frequency
2
(Skew Mode = FINE, f
400
Typical Skew Error vs. Setting
(Normalized to 800MHz)
4
420
VCO Frequency (MHz)
I
500
CCD
6
Skew Setting #
f
VCO
470
vs. f
V=4
(MHz)
8
VCO
520
600
VCO
10
= 800MHz)
570
12
700
800
14
PFD =
20 MHz
40 MHz
80 MHz
800
16
1-16
1.2
0.8
0.6
0.4
0.2
70
65
60
55
50
40
35
30
45
25
20
15
10
1
0
5
0
320
320
0
PFD = 40MHz
(LVCMOS 3.3V, Normalized to 266MHz)
PFD = 20MHz
ispClock5600A Family Data Sheet
5 0
370
370
Period Jitter vs. VCO Frequency
Phase Jitter vs. VCO Frequency
I
CCO
100
420
420
Output Frequency (MHz)
VCO Frequency (MHz)
VCO Frequency (MHz)
vs. Output Frequency
PFD = 40MHz
150
470
470
V=4
V=4
PFD* = 20MHz
PFD = 80MHz
PFD = 80MHz
200
520
520
250
570
570
300
800
800
350