ispPAC-CLK5620AV-01TN100I Lattice, ispPAC-CLK5620AV-01TN100I Datasheet - Page 3

• Manufacturer Part Number: ispPAC-CLK5620AV-01TN100I
• Description: Clock Drivers & Distribution ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I
• Manufacturer: Lattice

Specifications of ispPAC-CLK5620AV-01TN100I

• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 1-2. ispClock5620A Functional Block Diagram
FBKSEL
REFSEL
REFVTT
FBKVTT
REFA+
REFB+
FBKA+
FBKB+
REFA-
REFB-
FBKA-
FBKB-
0
Profile Select
PS0
0
1
0
1
Control
1
PS1
2
DIVIDER
INPUT
(1-40)
3
(1-40)
M
N
FEEDBACK
DIVIDER
E
2
Configuration
DETECT
DETECT
PHASE
LOCK
LOCK
TDI
JTAG INTERFACE
TMS
RESET
TCK
FILTER
LOOP
TDO
PLL_BYPASS
VCO
1-3
SGATE
OUTPUT ENABLE CONTROLS
1
0
GOE
SKEW ADJUST
FEEDBACK
OEX
DIVIDERS
OUTPUT
ispClock5600A Family Data Sheet
(2-80)
(2-80)
(2-80)
(2-80)
(2-80)
V0
V1
V2
V3
V4
OEY
OUTPUT ROUTING
MATRIX
CONTROL
CONTROL
SKEW
SKEW
DRIVERS
DRIVERS
OUTPUT
OUTPUT
BANK_0A
BANK_0B
BANK_1A
BANK_1B
BANK_2A
BANK_2B
BANK_3A
BANK_3B
BANK_4A
BANK_4B
BANK_5A
BANK_5B
BANK_6A
BANK_6B
BANK_7A
BANK_7B
BANK_8A
BANK_8B
BANK_9A
BANK_9B