LFXP2-5E-5QN208C Lattice, LFXP2-5E-5QN208C Datasheet - Page 58

• Manufacturer Part Number: LFXP2-5E-5QN208C
• Description: FPGA - Field Programmable Gate Array 5K LUTs 146I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-5E-5QN208C

• Number Of Macrocells: 5000
• Maximum Operating Frequency: 200 MHz
• Number Of Programmable I/os: 146
• Data Ram Size: 10 KB
• Supply Voltage (max): 1.14 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.26 V
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Typical Building Block Function Performance
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Register-to-Register Performance
Basic Functions
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Basic Functions
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
8-bit Adder
16-bit Adder
64-bit Adder
16-bit Counter
32-bit Counter
64-bit Counter
64-bit Accumulator
Embedded Memory Functions
512x36 Single Port RAM, EBR Output Registers
1024x18 True-Dual Port RAM (Write Through or Normal, EBR Output Registers)
1024x18 True-Dual Port RAM (Write Through or Normal, PLC Output Registers)
Distributed Memory Functions
16x4 Pseudo-Dual Port RAM (One PFU)
32x2 Pseudo-Dual Port RAM
64x1 Pseudo-Dual Port RAM
DSP Functions
18x18 Multiplier (All Registers)
9x9 Multiplier (All Registers)
36x36 Multiply (All Registers)
18x18 Multiply/Accumulate (Input and Output Registers)
18x18 Multiply-Add/Sub-Sum (All Registers)
Function
Function
3-14
1
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
-7 Timing
-7 Timing
521
537
484
744
678
616
529
570
507
293
541
440
321
261
315
315
231
760
455
351
342
342
330
218
292
4.4
5.2
5.6
3.7
3.9
4.3
4.5
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns