LAN9220-ABZJ SMSC, LAN9220-ABZJ Datasheet - Page 151

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LAN9220-ABZJ

Manufacturer Part Number
LAN9220-ABZJ
Description
Ethernet ICs 16Bit Single Chip Ethernet Controller
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9220-ABZJ

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Supply Current (max)
85 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220
REVISION LEVEL & DATE
(05-13-08)
(10-22-07)
Rev. 1.92
Rev. 2.1
Table 9.1 Customer Revision History (continued)
Auto-negotiation
Advertisement on page 120
Section 3.5, "Wake-up
Frame Detection," on
page 26
"MAC_CR—MAC Control
Register," on page 106
Section 5.4.12,
"WUCSR—Wake-up Control
and Status Register," on
page 115
Section 3.6.1.1, "RX
Checksum Calculation," on
page 32
Section 2.2, “External Pull-
Up/Pull-Down Resistors
Section 1.1, "Block
Diagram"
Chapter 2 Pin Description
and Configurationon
page 15
EECLK pin description in
Chapter 2 Pin Description
and Configurationon
page 15
SECTION/FIGURE/ENTRY
and
Section 5.4.1,
DATASHEET
151
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for..” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE
support are advertised, the device will only be
configured to, at most, one of the two settings
upon auto-negotiation completion.”
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the
up Control and Status
up frame will wake-up the device despite the state
of the Disable Broadcast Frame (BCAST) bit in the
MAC_CR—MAC Control
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
“checksum = [B0, B1] + C0 + [B2, B3] + C1 + …
+ [0, BN] + CN-1” changed to “checksum = [B1,
B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1”
Added section. Added references to this section
throughout the pin description tables as applicable.
Removed the system memory block and arrow
above the microprocessor/ microcontroller
Pin assignment information re-organized into
separate table.
Note added to EECLK pin description to indicate
proper usage.
CORRECTION
Register, a broadcast wake-
Register.”
WUCSR—Wake-
Revision 2.7 (03-15-10)

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