LAN9220-ABZJ SMSC, LAN9220-ABZJ Datasheet - Page 16

• Manufacturer Part Number: LAN9220-ABZJ
• Description: Ethernet ICs 16Bit Single Chip Ethernet Controller
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9220-ABZJ

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 85 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 2.7 (03-15-10)
2.1
Host Address
PHY External Bias
Read Strobe
Write Strobe
FIFO Select
Chip Select
Host Data
Interrupt
Request
NAME
Resistor
NAME
TPO+
TPO-
TPI+
TPI-
Note: The pin names for the twisted pair pins shown above apply to a normal connection. If HP Auto-
Pin List
MDIX is enabled and a reverse connection is detected, or a reverse connection is manually
selected, the input pins become outputs, and vice-versa, as indicated in the descriptions.
FIFO_SEL
SYMBOL
D[15:0]
A[7:1]
nWR
nRD
nCS
IRQ
SYMBOL
EXRES
TPO+
TPO-
TPI+
TPI-
BUFFER
Table 2.1 Host Bus Interface Signals
VIS/VO8
VOD8
TYPE
VO8/
VIS
VIS
VIS
VIS
VIS
Table 2.2 LAN Interface Signals
BUFFER
16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
TYPE
AO
AO
AI
AI
AI
DATASHEET
PINS
16
#
7
1
1
1
1
1
PINS
NUM
16
1
1
1
1
1
Bi-directional data port.
7-bit Address Port. Used to select Internal CSR’s and
TX and RX FIFOs.
Active low strobe to indicate a read cycle.
Active low strobe to indicate a write cycle. This signal,
qualified with nCS, is also used to wakeup the
LAN9220 when it is in a reduced power state.
Active low signal used to qualify read and write
operations. This signal qualified with nWR is also used
to wakeup the LAN9220 when it is in a reduced power
state.
Programmable Interrupt request. Programmable
polarity, source and buffer types.
When driven high all accesses to the LAN9220 are to
the RX or TX Data FIFOs. In this mode, the A[7:3]
upper address inputs are ignored.
Transmit Positive Output (normal)
Receive Positive Input (reversed)
Transmit Negative Output (normal)
Receive Negative Input (reversed)
Receive Positive Input (normal)
Transmit Positive Input (reversed)
Receive Negative Input (normal)
Transmit Negative Output (reversed)
Must be connected to ground through a 12.4K
ohm 1% resistor.
DESCRIPTION
DESCRIPTION
SMSC LAN9220
Datasheet