LAN9220-ABZJ SMSC, LAN9220-ABZJ Datasheet - Page 23

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LAN9220-ABZJ

Manufacturer Part Number
LAN9220-ABZJ
Description
Ethernet ICs 16Bit Single Chip Ethernet Controller
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9220-ABZJ

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Supply Current (max)
85 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220
3.2
3.2.1
3.2.2
3.2.3
The LAN9220 can store up to 250 Ethernet packets utilizing FIFOs, totaling 16K bytes, with a packet
granularity of 4 bytes. This memory is shared by the RX and TX blocks and is configurable in terms
of allocation. This depth of buffer storage minimizes or eliminates receive overruns.
The LAN9220 Ethernet MAC supports full-duplex flow control using the pause operation and control
frame. It also supports half-duplex flow control using back pressure.
Full-Duplex Flow Control
The pause operation inhibits data transmission of data frames for a specified period of time. A Pause
operation consists of a frame containing the globally assigned multicast address (01-80-C2-00-00-01),
the PAUSE opcode, and a parameter indicating the quantum of slot time (512 bit times) to inhibit data
transmissions. The PAUSE parameter may range from 0 to 65,535 slot times. The Ethernet MAC logic,
on receiving a frame with the reserved multicast address and PAUSE opcode, inhibits data frame
transmissions for the length of time indicated. If a Pause request is received while a transmission is
in progress, then the pause will take effect after the transmission is complete. Control frames are
received and processed by the MAC and are passed on.
The MAC also transmits control frames (pause command) via both hardware and software control. The
software driver requests the MAC to transmit a control frame and gives the value of the PAUSE time
to be used in the control frame. The MAC Function constructs a control frame with the appropriate
values set in all the different fields (as defined in the 802.3x specification) and transmits the frame to
the MII interface. The transmission of the control frame is not affected by the current state of the Pause
timer value that is set because of a recently received control frame.
Half-Duplex Flow Control (Backpressure)
In half-duplex mode, back pressure is used for flow control. Whenever the receive buffer/FIFO
becomes full or crosses a certain threshold level, the MAC starts sending a Jam signal. The MAC
transmit logic enters a state at the end of current transmission (if any), where it waits for the beginning
of a received frame. Once a new frame starts, the MAC starts sending the jam signal, which will result
in a collision. After sensing the collision, the remote station will back off its transmission. The MAC
continues sending the jam to make other stations defer transmission. The MAC only generates this
collision-based back pressure when it receives a new frame, in order to avoid any late collisions.
Virtual Local Area Network (VLAN) Support
Virtual Local Area Networks or VLANs, as defined within the IEEE 802.3 standard, provide network
administrators one means of grouping nodes within a larger network into broadcast domains. To
implement a VLAN, four extra bytes are added to the basic Ethernet packet. As shown in
"VLAN
field. The first two bytes of the VLAN tag identify the tag, and by convention are set to the value
0x8100. The last two bytes identify the specific VLAN associated with the packet; they also provide a
priority field.
The LAN9220 supports VLAN-tagged packets. The LAN9220 provides two registers which are used to
identify VLAN-tagged packets. One register should normally be set to the conventional VLAN ID of
0x8100. The other register provides a way of identifying VLAN frames tagged with a proprietary (not
0x8100) identifier. If a packet arrives bearing either of these tags in the two bytes succeeding the
Source Address field, the controller will recognize the packet as a VLAN-tagged packet. In this case,
the controller increases the maximum allowed packet size from 1518 to 1522 bytes (normally the
controller filters packets larger than 1518 bytes). This allows the packet to be received, and then
processed by host software, or to be transmitted on the network.
Flow Control
Frame", the four bytes are inserted after the Source Address Field and before the Type/Length
DATASHEET
23
Revision 2.7 (03-15-10)
Figure 3.1,

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