LAN9220-ABZJ SMSC, LAN9220-ABZJ Datasheet - Page 29

• Manufacturer Part Number: LAN9220-ABZJ
• Description: Ethernet ICs 16Bit Single Chip Ethernet Controller
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9220-ABZJ

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 85 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220
3.6
3.6.1
Destination Address Source Address ……………FF FF FF FF FF FF
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55 00 11 22 33 44 55
…CRC
It should be noted that Magic Packet detection can be performed when LAN9220 is in the D0 or D1
power states. In the D0 state, “Magic Packet” detection is enabled when the MPEN bit is set. In the
D1 state, Magic Packet detection, as well as wake-up frame detection, are automatically enabled when
the device enters the D1 state.
The LAN9220 contains two checksum offload engines, which offload the calculation of the 16-bit
checksum for transmitted and received Ethernet frames. The functionality of the checksum offload
engines is described in the following sections:
Receive Checksum Offload Engine (RXCOE)
The receive checksum offload engine provides assistance to the CPU by calculating a 16-bit checksum
for a received Ethernet frame. The RXCOE readily supports the following IEEE802.3 frame formats:
The resulting checksum value can also be modified by software to support other frame formats.
The RXCOE has two modes of operation. In mode 0, the RXCOE calculates the checksum between
the first 14 bytes of the Ethernet frame and the FCS. This is illustrated in
In mode 1, the RXCOE supports VLAN tags and a SNAP header. In this mode the RXCOE calculates
the checksum at the start of L3 packet. The VLAN1 tag register is used by the RXCOE to indicate
what protocol type is to be used to indicate the existence of a VLAN tag. This value is typically 8100h.
Checksum Offload Engines (COE)
Receive Checksum Offload Engine (RXCOE)
Transmit Checksum Offload Engine (TXCOE)
Type II Ethernet frames
SNAP encapsulated frames
Support for up to 2, 802.1q VLAN tags
DST
SRC
T
Y
P
E
Figure 3.4 RXCOE Checksum Calculation
DATASHEET
Calculate Checksum
29
Frame Data
Figure
F
C
S
3.4.
Revision 2.7 (03-15-10)