XC2VP7-5FF672C Xilinx Inc, XC2VP7-5FF672C Datasheet - Page 82

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XC2VP7-5FF672C

Manufacturer Part Number
XC2VP7-5FF672C
Description
FPGA Virtex-II Pro™ Family 11088 Cells 1050MHz 0.13um/90nm (CMOS) Technology 1.5V 672-Pin FCBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC2VP7-5FF672C

Package
672FCBGA
Family Name
Virtex-II Pro™
Device Logic Units
11088
Number Of Registers
9856
Maximum Internal Frequency
1050 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
396
Ram Bits
811008

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Virtex-II Pro Switching Characteristics
Switching
per-speed-grade basis and can be designated as Advance,
Preliminary, or Production. Note that
mance Characteristics
well. Each designation is defined as follows:
Advance: These speed files are based on simulations only
and are typically available soon after device design specifi-
cations are frozen. Although speed grades with this desig-
nation are considered relatively stable and conservative,
some under-reporting might still occur.
Preliminary: These speed files are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production: These speed files are released once enough
production silicon of a particular device family member has
been characterized to provide full correlation between
speed files and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes. Typ-
ically, the slowest speed grades transition to Production
before faster speed grades.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
Virtex-II Pro device with a corresponding speed file desig-
nation.
PowerPC Switching Characteristics
Table 16: Processor Clocks Absolute AC Characteristics
DS083 (v4.7) November 5, 2007
Product Specification
Notes:
1. IMPORTANT! When CPMC405CLOCK runs at speeds greater than 350 MHz in -7 Commercial grade dual-processor devices, or
2. The theoretical maximum frequency of this clock is one-half the CPMC405CLOCK. However, the achievable maximum is dependent
3. The theoretical maximum frequency of these clocks is equal to the CPMC405CLOCK. However, the achievable maximum is
CPMC405CLOCK frequency
JTAGC405TCK frequency
PLBCLK
BRAMDSOCMCLK
BRAMISOCMCLK
greater than 300 MHz in -6 Industrial grade dual-processor devices, users must implement the technology presented in XAPP755,
“PowerPC 405 Clock Macro for -7(C) and -6(I) Speed Grade Dual-Processor Devices.” Refer to
dual-processor devices.
on the system, and will be much less.
dependent on the system. Please see
Table 15
(3)
R
characteristics
Description
correlates the current status of each
(3)
(3)
are subject to these guidelines, as
(2)
are
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
PowerPC 405 Processor Block Reference Guide
specified
Virtex-II Pro Perfor-
Min
0
0
0
0
0
on
www.xilinx.com
-7
a
Max
400
200
400
400
400
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
Table 15: Virtex-II Pro Device Speed Grade Designations
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values. For more
specific, more precise, and worst-case guaranteed data,
use the values reported by the static timing analyzer (TRCE
in the Xilinx Development System) and back-annotate to the
simulation net list. Unless otherwise noted, values apply to
all Virtex-II Pro devices.
(1)
XC2VP2
XC2VP4
XC2VP7
XC2VP20
XC2VPX20
XC2VP30
XC2VP40
XC2VP50
XC2VP70
XC2VPX70
XC2VP100
Device
Min
Speed Grade
0
0
0
0
0
-6
Advance
Max
175
350
350
350
350
and
(1)
Speed Grade Designations
XAPP640
Table 1, Module 1
Min
0
0
0
0
0
Preliminary
-6, -5
-6, -5
for more information.
-5
Max
300
150
300
300
300
to identify
Production
Module 3 of 4
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-6, -5
Units
MHz
MHz
MHz
MHz
MHz
11

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