L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 221

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix A: Registers
Rx_Packets
Table 306. Rx_Packets Field Parameters
Statistics counters roll over from their maximum count to zero without warning or indication that a rollover has
occurred. It is expected that the supervisor sample these counters often and use the delta from a previous sample
to the current sample to determine the overall count delta. If the current sample has a smaller value than the previ-
ous sample (indicating a rollover), then 2
delta to determine the actual delta. All statistics counters’ widths are scaled to allow for sampling by the supervisor
ten times per second without risk of missing a rollover event.
rx_unicast_packets[21:0]
rx_multicast_packets[21:0]
rx_broadcast_packets[21:0]
rx_pause_packets[21:0]
rx_other_control[21:0]
Field Name
(continued)
REFERENCE
PORT
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
XG1
Figure 235. Port Numbering Scheme
49
Offset = 800.10
n
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Agere Systems - Proprietary
Instances = 50
Instances = 50
Instances = 50
Instances = 50
Instances = 50
Offset = 12.10
Spacing = 4.0
XG0
Offset = 0.10
Offset = 4.10
Offset = 8.10
Mode = R/W
Mode = R/W
Mode = R/W
Mode = R/W
Mode = R/W
(where n is the number of bits in the statistics counter) is added to the
Parameters
48
G = 10/100/1000 Mbits/s PORT
XG = 10 Gbits/s PORT
SU = SUPERVISOR
PORT NUMBERING SCHEME
G47
47
G46
46
G45
45
G44
44
The number of packets received (without errors)
whose destination address is a unicast address.
The number of packets received (without errors)
whose destination address is a multicast address.
The number of packets received (without errors)
whose destination address is the broadcast
address.
The number of packets received (without errors)
that are pause control packets.
The number of packets received (without errors)
that are control packets other than pause packets.
G3
3
G2
2
Description
G1
1
G0
0
ET4148-50
221