L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 51

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Data Structures
Supervisor_Tx_Fifo_{0..1}
Descriptions: FIFO list of transmit descriptor block pointers.
Table 13. Supervisor_Tx_Fifo_{0..1} Register Parameters
Table 14. Supervisor_Tx_Fifo_{0..1}
This data structure is a collection of pointers to transmit descriptor blocks.
The physical extent of Supervisor_Tx_Fifo{0..1} is defined by Supervisor_Tx_Fifo_Limits_{0..1}.
Base Address
Structure Size
Structure Instances
Structure Spacing
tx_descriptor_ptr[31:2]
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Parameter
0
1
Field Name
2
3
4
(continued)
5
6
Supervisor_Tx_Fifo_Limits_{0..1}.start_ptr[31:2]
Supervisor_Tx_Fifo_Limits_{0..1}.end_ptr[31:2] -
Supervisor_Tx_Fifo_Limits_{0..1}.start_ptr[31:2] + 4
Figure 25. Supervisor_Tx_Fifo_{0..1} Data Structure
7
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
8
9
10
Agere Systems - Proprietary
11
Mode = R/W
Parameters
Offset = 0.0
tx_descriptor_ptr[31:2]
12
13
14
15
16
Variable
Value
17
A pointer to a supervisor transmit packet descriptor
block.
2
18
19
20
21
22
23
8
Description
24
7
25
6
26
5
27
4
28
3
29
2
30
1
0
ET4148-50
31
0
0
51