L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 227

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix A: Registers
Supervisor_Endian
Description: Establishes the endian mode of the PCI interface.
Table 311. Supervisor_Endian Register Parameters
Table 312. Supervisor_Endian Field Parameters
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
big_endian
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Parameter
1
Field Name
2
3
4
5
6
7
Figure 240. Supervisor_Endian Register Diagram
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
8
0x000c_c520
9
10
Value
NA
NA
Agere Systems - Proprietary
4
1
4
1
11
Instances = 1
Offset = 0.31
Mode = R/W
Parameters
12
13
14
15
16
17
When asserted, this PCI interface presents data
across the PCI bus in a big-endian fashion. Little
endian (this bit deasserted) is the default behavior.
18
19
20
21
22
23
8
Description
24
7
25
6
26
5
27
4
28
3
29
2
ET4148-50
30
1
31
0
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