MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 27

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MT41J256M8HX-15E:D

Manufacturer Part Number
MT41J256M8HX-15E:D
Description
MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Series
-r
Datasheets

Specifications of MT41J256M8HX-15E:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Compliant

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Electrical Specifications
Absolute Ratings
Table 6:
Input/Output Capacitance
Table 7:
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D2.fm - Rev G 2/09 EN
Capacitance Parameters
CK and CK#
ΔC: CK to CK#
Single-end I/O: DQ, DM
Differential I/O:
DQS, DQS#, TDQS, TDQS#
ΔC: DQS to DQS#, TDQS, TDQS#
ΔC: DQ to DQS
Inputs (CTRL, CMD, ADDR)
ΔC: CTRL to CK
ΔC: CMD_ADDR to CK
V
Symbol
IN
V
V
T
, V
DD
T
STG
DD
C
OUT
Q
Absolute Maximum Ratings
Input/Output Capacitance
Note 1 applies to the entire table
V
V
Voltage on any pin relative to V
DD
DD
Notes:
Notes:
Operating case temperature
supply voltage relative to V
supply voltage relative to V
Storage temperature
Parameter
Stresses greater than those listed in Table 6 may cause permanent damage to the device.
This is a stress rating only, and functional operation of the device at these or any other
conditions outside those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may
adversely affect reliability.
1. V
2. MAX operating case temperature. T
3. Device functionality is not guaranteed if the DRAM device exceeds the maximum T
1. V
2. DM input is grouped with I/O pins, reflecting the fact that they are matched in loading.
3. Includes TDQS, TDQS#. C
4. C
5. Excludes CK, CK#; CTRL = ODT, CS#, and CKE; CMD = RAS#, CAS#, and WE#; ADDR = A[n:0],
6. C
7. C
greater than 0.6 × V
Figure 12 on page 28).
operation.
V
BA[2:0].
DIO
DI
DI
DD
DD
OUT
_
_
CTRL
CMD
and V
= +1.5V ±0.075mV, V
(
= C
DC
C
) = 0.5 × V
DI
_
IO
= C
ADDR
Symbol
C
_
DD
(DQ) - 0.5 × (C
C
CMD
DI
C
C
I
C
DDQS
C
C
DCK
_
Q must be within 300mV of each other at all times, and V
DIO
C
(CTRL) - 0.5 × (C
CK
IO
IO
CTRL
I
= C
_
ADDR
SS
SS
SS
I
DD
Q
(CMD_ADDR) - 0.5 × (C
DD
Q, V
Q. When V
Min
0.75
DDR3-800
–0.5
–0.5
–0.5
0.8
1.5
1.5
0
0
OUT
DDQS
IO
DD
[DQS] + C
Q = V
27
CK
(peak-to-peak) = 0.1V.
Max
0.15
is for DQS vs. DQS# and TDQS vs. TDQS# separately.
Min
–0.4
–0.4
–0.4
1.6
3.0
3.0
0.2
0.3
1.4
0.3
0.5
–55
[CK] + C
0
DD
DD
, V
C
DDR3-1066 DDR3-1333 DDR3-1600
Min
and V
–0.5
0.75
–0.5
–0.5
IO
0.8
1.5
1.5
is measured in the center of the package (see
0
0
REF
Micron Technology, Inc., reserves the right to change products or specifications without notice.
[DQS#]).
CK
CK
= V
[CK#]).
DD
Max
0.15
1.35
1.6
3.0
3.0
0.2
0.3
0.3
0.5
[CK] + C
Q are less than 500mV, V
SS
1.975
1.975
1.975
Max
, f = 100 MHz, T
150
95
2Gb: x4, x8, x16 DDR3 SDRAM
Min
–0.5
0.75
–0.4
–0.4
0.8
1.5
1.5
0
0
CK
[CK#]).
Max
0.15
0.15
1.4
2.5
2.5
0.3
1.3
0.2
0.4
Electrical Specifications
C
Units
©2006 Micron Technology, Inc. All rights reserved.
= 25°C.
Min
0.75
–0.5
–0.4
–0.4
°C
°C
0.8
1.5
1.5
V
V
V
0
0
REF
REF
Max
0.15
0.15
1.4
2.3
2.3
0.3
1.3
0.2
0.4
may be ≤300mV.
must not be
Units Notes
pF
pF
pF
pF
pF
pF
pF
pF
pF
Notes
2, 3
1
C
during
2
3
3
4
5
6
7

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