MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 61

• Manufacturer Part Number: MT41J256M8HX-15E:D
• Description: MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr
• Series: -r

Specifications of MT41J256M8HX-15E:D

• Organization: 256Mx8
• Address Bus: 18b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 165mA
• Pin Count: 78
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 2G (256M x 8)
• Speed: 667MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 78-TFBGA
• Lead Free Status / RoHS Status: Compliant

Table 47:
Output Characteristics and Operating Conditions
Table 48:
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D3.fm - Rev G 2/09 EN
Parameter/Condition
Output leakage current: DQ are disabled;
0V ≤ V
Output slew rate: Single-ended; For rising and falling
edges, measure between V
V
Single-ended DC high-level output voltage
Single-ended DC mid-point level output voltage
Single-ended DC low-level output voltage
Single-ended AC high-level output voltage
Single-ended AC low-level output voltage
Delta R
Test load for AC timing and output slew rates
OH
(
AC
OUT
) = V
ON
≤ V
between pull-up and pull-down for DQ/DQS
REF
DD
40Ω Output Driver Voltage and Temperature Sensitivity
Single-Ended Output Driver Characteristics
All voltages are referenced to Vss
+ 0.1 × V
Q; ODT is disabled; ODT is HIGH
Notes:
DD
Q
OL
The DRAM uses both single-ended and differential output drivers. The single-ended
output driver is summarized in Table 48 while the differential output driver is summa-
rized in Table 49 on page 62.
1. RZQ of 240Ω (±1%) with RZQ/7 enabled (default 34Ω driver) and is applicable after proper
2. V
3. See Figure 29 on page 63 for the test load configuration.
4. The 6 V/ns maximum is applicable for a single DQ signal when it is switching from either
5. See Table 38 on page 58 for IV curve linearity. Do not use AC test load.
6. See Table 50 on page 64 for output slew rate.
7. See Table 38 on page 58 for additional information.
8. See Figure 27 on page 62 for an example of a single-ended output signal.
(
AC
ZQ calibration has been performed at a stable temperature and voltage (V
V
HIGH to LOW or LOW to HIGH while the remaining DQ signals in the same byte lane are
either all static or all switching the opposite direction. For all other DQ signal switching
combinations, the maximum limit of 6 V/ns is reduced to 5V/ns.
) = V
SS
TT
Q = V
dR
dR
dR
= V
dR
dR
dR
Change
REF
ON
ON
ON
ON
ON
ON
DD
SS
dVM
- 0.1 × V
dTM
dVH
dTH
dTL
dVL
Q/2.
).
DD
Q and
Output Characteristics and Operating Conditions
61
Symbol
MM
V
V
V
V
V
Min
SRQ
OM
OH
OH
OL
OL
0
0
0
0
0
0
I
OZ
Output to V
(
(
PUPD
(
(
(
DC
AC
DC
AC
DC
SE
)
)
)
)
)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
V
V
–10
2.5
–5
TT
TT
TT
0.8 × V
0.5 × V
0.2 × V
(V
+ 0.1 × V
- 0.1 × V
2Gb: x4, x8, x16 DDR3 SDRAM
DD
Q/2) via 25Ω resistor
Max
0.15
0.15
0.15
DD
DD
DD
1.5
1.5
1.5
Q
Q
Q
Max
DD
DD
+10
+5
6
Q
Q
©2006 Micron Technology, Inc. All rights reserved.
Units
V/ns
µA
%
V
V
V
V
V
DD
%/mV
%/mV
%/mV
Q = V
%/°C
%/°C
%/°C
Unit
1, 2, 3, 4
1, 2, 3, 6
1, 2, 3, 6
Notes
1, 2, 5
1, 2, 5
1, 2, 5
DD
1, 7
1
3
,