20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 101
![IC CPU RABBIT2000 30MHZ 100PQFP](/photos/6/76/67658/316-100-pqfp_sml.jpg)
20-668-0003
Manufacturer Part Number
20-668-0003
Description
IC CPU RABBIT2000 30MHZ 100PQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0003.pdf
(228 pages)
Specifications of 20-668-0003
Processor Type
Rabbit 2000 8-Bit
Speed
30MHz
Voltage
2.7V, 3V, 3.3V, 5V
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Data Bus Width
8 bit
Maximum Clock Frequency
30 MHz
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8 & 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
20-668-0003
316-1062
316-1062
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
20-668-0003
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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8.3.2 MMU Instruction/Data Register
8.3.2.1 Instruction and Data Space Support
Support for Instruction and Data space (I and D space) support was added in revisions A–C
by optionally inverting address lines A16 and/or A19 when the processor accesses D
space, but not inverting those lines when the processor accesses I space. The MMIDR reg-
ister is used to control this inversion. Refer to Section B.2.5 for more information on using
I and D space on the Rabbit 2000 chip. More information on separate I and D implementa-
tion will be available in the Rabbit 2000 Designer’s Handbook, and is currently available
in the Rabbit 3000 Designers Handbook.
8.3.2.2 /CS1 Enable
The optional enable of /CS1 is valuable for systems that are pushing the access time of
battery-backed RAM. By enabling /CS1, the delay time of the switch that forces /CS1
high when power is off can be bypassed. This feature increases power consumption since
the RAM is always enabled and its access is controlled normally by /OE1. This option is
enabled by setting bit 4 in the MMIDR register. See Section B.2.5 for more information.
8.3.3 Memory Timing Control Register
8.3.3.1 Early Memory Output-Enable Feature
The early I/O enable feature was added to the Rabbit 2000C revision to relax the tight tim-
ing requirements for memory access when using the clock spectrum spreader. See
Section B.2.13 for more information.
Chapter 8 Memory Mapping and Interface
95
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