20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 219
20-668-0003
Manufacturer Part Number
20-668-0003
Description
IC CPU RABBIT2000 30MHZ 100PQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0003.pdf
(228 pages)
Specifications of 20-668-0003
Processor Type
Rabbit 2000 8-Bit
Speed
30MHz
Voltage
2.7V, 3V, 3.3V, 5V
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Data Bus Width
8 bit
Maximum Clock Frequency
30 MHz
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8 & 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
20-668-0003
316-1062
316-1062
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
20-668-0003
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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B.2.6 Write Inhibit (/WE0) After Reset
This feature, available in revisions A–C, modified the reset state of the MB0CR register to
inhibit /WE0. Inhibiting writes after reset prevents the processor from inadvertently writ-
ing to an unprogrammed flash memory that doesn’t have the software data protection
enabled. In a flash memory where the software data protection is enabled, an inadvertent
write will temporarily disable the flash memory if the memory is used to execute code.
This has not been a serious problem in the past for two reasons. First, programming sys-
tems using Dynamic C permanently enable software data protection, and second, most
manufacturers ship their memory devices with software data protection permanently
enabled.
Software data protection consists of a three-byte load sequence that is used to initiate pro-
gram operation during the system power-up or power-down, providing protection from
inadvertent write operations. Flash devices usually provide a chip-erase operation, which
allows the user to erase the entire memory array to the ‘1’s state. Flash devices are nor-
mally erased prior to shipment. When the Rabbit processor comes out of reset, it begins
fetching instructions from address zero of the device connected to /CS0, /OE0, and /WE0,
which in most cases is a flash memory. If the flash contains 0xff at address zero, the pro-
cessor will decode this as an RST 38. An RST 38 vectors to an ISR area at address 0x70
and pushes the PC onto the stack, which by default is located at address 0x00 (flash mem-
ory). This can be a problem if the flash is repeatedly written to in an endless loop because
flash memories can only endure a finite number of writes, typically about 100,000.
B.2.7 Chip Selects Inactive During Internal I/O
In the original Rabbit 2000, it was found that whichever chip select was mapped to
MB0CR would become active during internal I/O operations. This behavior did not cause
any problems, but was corrected in revisions A–C.
B.2.8 External Interrupt Input Bug Fix
The external interrupt bug discovered in the original Rabbit 2000 required the external
interrupt inputs to be tied together with a resistor as described in Technical Note TN301,
Rabbit 2000 Microprocessor Interrupt Problem. This bug was subsequently fixed in revi-
sions A-C of the Rabbit 2000, and two separate external interrupt inputs are available on
these devices.
B.2.9 IOI/IOE Prefix Bug Fix
Certain instructions did not function correctly as described in Technical Note TN302,
Rabbit 2000 Instruction Bug. The problem was corrected in revisions A–C of the Rabbit
2000.
Appendix B Rabbit 2000 Revisions
213
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