20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 40

• Manufacturer Part Number: 20-668-0003
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 20-668-0003

• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 30 MHz
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8 & 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-668-0003; 316-1062

Another method of doing signed compare is to first map the signed integers onto unsigned
integers by inverting bit 15. This is shown in Figure 3-7 on page 34. Once the mapping
has been performed by inverting bit 15 on both numbers, the comparisions can be done as
if the numbers were unsigned integers. This avoids having to construct a jump tree to test
the overflow and sign flags. An example is shown below.
3.4.5 Atomic Moves from Memory to I/O Space
To avoid disabling interrupts while copying a shadow register to its target register, it is
desirable to have an atomic move from memory to I/O space. This can be done using LDD
or LDI instructions.
When the
address specified by DE. The decrementing of HL and DE is a side effect. If the repeating
instructions
tions. Word stores to I/O space can be used to set two I/O registers at adjacent addresses
with a single noninterruptable instruction.
34
A>B
A<B
A==B
A>=B
A<=B
; test HL>5 for signed integers
LD DE,65535-(5+0x08000)
LD BC,0x08000
ADD HL,BC
ADD HL,DE
; carry now set if HL>5 - opportunity to jump on carry
SUBC HL,HL
BOOL HL
LD HL,sh_PDDDR
LD DE,PDDDR
SET 5,(HL)
IOI ldd
Figure 3-7. Mapping Signed Integers to Unsigned Integers by Inverting Bit 15
LDD
LDIR
(!S & !V & !Z) v (S & V)
(S & !V) v (!S & V & !Z)
instruction is prefixed with an I/O prefix, the destination becomes the I/O
and
; invert high bit
; 16 clocks to here
; HL-HL-C
; 22 clocks total - true if HL>5 else false
LDDR
0111...
000...
111...
100...
; point to shadow register
; set DE to point to I/O reg
; set bit 5 of shadow register
; use ldd instruction for atomic transfer
; (io DE)<-(HL)
are used, interrupts can take place between successive itera-
; if C on result is
; 5 mapped to unsigned integers
HL--, DE--
1111...
100...
011...
000...
Rabbit 2000 Microprocessor User’s Manual
-1, else zero