20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 71
20-668-0003
Manufacturer Part Number
20-668-0003
Description
IC CPU RABBIT2000 30MHZ 100PQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0003.pdf
(228 pages)
Specifications of 20-668-0003
Processor Type
Rabbit 2000 8-Bit
Speed
30MHz
Voltage
2.7V, 3V, 3.3V, 5V
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Data Bus Width
8 bit
Maximum Clock Frequency
30 MHz
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8 & 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
20-668-0003
316-1062
316-1062
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
20-668-0003
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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6.1 Default Values for all the Peripheral Control Registers
The default values for all of the peripheral control registers are shown in Table 6-1. Addi-
tional I/O registers were added in the Rabbit 2000 revisions as listed in the table. Refer to
Section B.2.1 for more information.
The registers within the CPU affected by a reset are the Stack Pointer (SP) register, the Pro-
gram Counter (PC) register, the IIR register, the EIR register, and the IP register. The IP
register is set to all ones (disabling all interrupts), while all of the other listed CPU registers
are reset to all zeros.
Chapter 6 Rabbit Internal I/O Registers
Data Segment Register (data segment memory
pointer—locates data segment in physical
memory)
Segment Size Register (specifies start of data
segment and start of stack segment in 64K
memory space)
Stack Segment Register (stack segment mem-
ory pointer—locates stack segment in physical
memory)
Global Control/Status Register (control of
clocks, periodic interrupts, and monitoring of
watchdog)
Global Clock Double Register
Global Clock Modulator 0 Register (Rev B–C) GCM0R
Global Clock Modulator 1 Register (Rev B–C) GCM1R
Global CPU Configuration Register (Rev A–C) GCPU
Global Output Control Register
6. R
Register Name
ABBIT
Table 6-1. Rabbit Internal I/O Registers
I
NTERNAL
DATASEG
(Z180 BBR)
SEGSIZE
(Z180 CBAR)
STACKSEG
(Z180 CBR)
GCSR
GCDR
GOCR
Mnemonic
0x12
0x13
0x11
0x0
0xF
0x0A
0x0B
0x2E
0xE
I/O Address
I/O R
R/W
R/W
R/W
R/W
W
W
W
R
W
EGISTERS
R/W
00000000
11111111
00000000
11000000
xxxxx000
00000000
00000000
0xx00000
00000x00
Reset
65
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