20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 192

• Manufacturer Part Number: 20-668-0003
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 20-668-0003

• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 30 MHz
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8 & 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-668-0003; 316-1062

18.19 Privileged Instructions
The privileged instructions are described in this section. Privilege means that an interrupt
cannot take place between the privileged instruction and the following instruction.
The three instructions below are privileged.
The instructions to load the stack are privileged so that they can be followed by an instruc-
tion to load the stack segment (SSEG) register without the danger of an interrupt taking
place with and incorrect association between the stack pointer and the stack segment reg-
ister. For example,
The following instructions are privileged.
The instructions to modify the IP register are privileged so that they can be followed by a
return instructions that is guaranteed to execute before another interrupt takes place. This
avoids the possibility of an ever-growing stack.
The instruction
instruction. If preceded by a
be done with no possible interrupt.
The instruction
interrupt priority or program counter without an intervening interrupt.
The instruction bit
without disabling interrupts. The following sequence is used. A bit is a semaphore, and the
first task to set the bit owns the semaphore and has a right to manipulate the resources
associated with the semaphore.
The
instruction, if the flag is zero that means that the semaphore was not set when tested by the
bit instruction and that the set instruction has set the semaphore. If an interrupt was
allowed between the
two routines could think that they both owned the semaphore.
186
SET
LD SP,HL
LD SP,IY
LD SP,IX
LD SP,HL
IOI LD (STACKSEG),A
IPSET 0
IPSET 1
IPSET 2
IPSET 3
IPRES
POP IP
RETI
LD A,XPC ; get and set the XPC
LD XPC,A
BIT B,(HL) ; test a bit in memory
BIT B,(HL)
SET B,(HL)
JP z,ihaveit
; here I don’t have it
instruction has no effect on the flags. Since no interrupt takes place after the
reti
LD XPC,A
; rotate IP right 2 bits, restoring previous priority
; pop IP register from stack
; pops IP from stack and then pops return address
; load the stack pointer
; shift IP left and set priority 00 in bits 1,0
B,(HL)
BIT
can be used to set both the return address and the IP in a single
and set instructions, another routine could set the semaphore and
is privileged so that it can be followed by other code setting
is privileged to make it possible to implement a semaphore
LD XPC
, a complete jump or call to a computed address can
Rabbit 2000 Microprocessor User’s Manual
BIT