20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 158

• Manufacturer Part Number: 20-668-0003
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 20-668-0003

• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 30 MHz
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8 & 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-668-0003; 316-1062

The industrial clock speed values in Table 15-1 (at a maximum temperature of 85°C) are
improved by 7% over commercial ratings at 70°C (which are extended to -40°C here). The
effect of temperature alone is a clock speed that is approximately 1.2% lower for each 5°C
temperature increase. The maximum clock speed is approximately directly proportional to
the operating voltage.
If serial communication is to be used at standard baud rates, then certain clock speeds
must be used. These clock speeds are usually multiples of 1.8432 MHz to ensure that baud
rates of 57,600 bps, 19,200 bps, and less will be available. Multiples of 3.6862 MHz
ensure that baud rates of 115,200 bps, 38,400 bps, and less will be available. Multiples of
1.2288 MHz ensure that baud rates of 38,400 bps and less will be available. The standard
Rabbit BIOS will accept any clock speed that is a multiple of 0.6144 MHz.
The graphs in Figure 15-1 and Figure 15-2 illustrate the maximum clock speed at which
no failure is detected for a typical Rabbit 2000 as the voltage and temperature are varied.
The official design specifications specify a lower maximum frequency to allow for pro-
cess variation.
The die suffers significant self-heating at higher clock speeds. The die to ambient thermal
impedance is 44°C/W at zero air flow. At 5 V and a current consumption of 65 mA, this
would result in about 15°C of self-heating, and would reduce the maximum clock speed
by approximately 3%. This reduction is included in Table 15-2, which provides the mem-
ory access time requirements.
When interfacing to memory devices, the memory access time required for a directly
interfaced memory is given by:
where T
data setup time relative to the clock. T
4 for memory read/write and I/O read/write cycles. Most 5 V memories are TTL compatible
in that they switch at 0.8 V and 2.0 V. T
voltage reaches 30% or 70% of VDD for falling and rising signals respectively. T
specified for the time from the clock that is required for the signal to reach 0.8 V.
The T
T
dle double the capacitance with the same delay times. The T
memory chip select lines.
The formula in Equation (1) remains true if the clock doubler is used, except that the
access time must be reduced by 4% of one clock period if there is an odd number of wait
states. The length of the T
bler is used.
152
adr
depends on the bus loading—address line A0 has a more powerful driver and can han-
adr
adr
measured was the time required for the signal to fall from a high level to 0.8 V.
is the delay between the rising edge of T
access time = (clock period)*(2 + wait states) - T
oe
pulse is subjected to a reduction of up to 4% if the clock dou-
adr
setup
and T
is specified from the point at which the input
setup
are shown in Figure 15-3 to Figure 15-
1
Rabbit 2000 Microprocessor User’s Manual
and address valid, and T
setup
adr
times also apply to the
- T
adr
setup
oe
is the
is
(1)