LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 439

• Manufacturer Part Number: LFE2-20E-5FN256I
• Description: IC FPGA 21KLUTS 193I/O 256FPBGA
• Manufacturer: Lattice
• Series: ECP2r

Specifications of LFE2-20E-5FN256I

• Number Of Logic Elements/cells: 21000
• Number Of Labs/clbs: 2625
• Total Ram Bits: 282624
• Number Of I /o: 193
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-BGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1170; LFE2-20E-5FN256I; Q6411457

Lattice Semiconductor
Table 8-11. SERDES_PCS GUI Attributes (LatticeECP2M) - SERDES Advanced Setup Tab
Differential
Output Voltage
PreEmphasis
Tx I/O Termination (Ohms)
Equalization
Rx I/O Termination (Ohms)
Rx I/O Coupling
Loss of Signal Threshold
Tx PLL Reference Clock I/O
Termination (Ohms)
Tx PLL Reference Clock I/O
Coupling
PLL Loss of Lock
1. Refer to Appendix D for details.
2. The typical capacitor value of the internal on-chip AC coupling is 5 pF.
3. Termination resistors and their usage
RX I/O Termination:
TX I/O Termination:
TX PLL Termination:
50: So far all of the protocols except SMTPE use 50 Ohms termination resistor.
60: Provided for flexibility purpose only.
75: SMPTE uses 75 Ohm termination resistor.
HIGH: Such as PCI Express Rx detection.
50: So far all of the protocols except SMTPE use 50 Ohms termination resistor.
75: SMPTE uses 75 Ohm termination resistor.
5K: Such as PCI Express electric idle and PCI Express Rx detection.
50: If there is no 50 Ohm termination resistor on PCB board
2K: If there is 50 Ohm termination resistor on PCB board
1
GUI Text
LatticeECP2M-35 CH0_TDRV_AMP
All other devices
LatticeECP2M-35 CH0_TX_PRE
All other devices
3
3
3
CH1_TDRV_AMP
CH2_TDRV_AMP
CH3_TDRV_AMP
CH1_TX_PRE
CH2_TX_PRE
CH3_TX_PRE
CH0_RTERM_TX
CH1_RTERM_TX
CH2_RTERM_TX
CH3_RTERM_TX
CH0_RX_EQ
CH1_RX_EQ
CH2_RX_EQ
CH3_RX_EQ
CH0_RTERM_RX
CH1_RTERM_RX
CH2_RTERM_RX
CH3_RTERM_RX
CH0_RX_DCC
CH1_RX_DCC
CH2_RX_DCC
CH3_RX_DCC
LOS_THRESHOLD Drop Down
PLL_TERM
PLL_DCC
PLL_LOL_SET
Attribute Names
Drop Down
Drop Down
Drop Down
Drop Down
Drop Down
Drop Down
Drop Down
Drop Down
Drop Down
Box Type
Button/
8-34
LatticeECP2M SERDES/PCS Usage Guide
0(990mV: default), 1(1250mV), 2 (1300mV),
Disable, 0 (0%), 1 (16%), 2 (36%), 3 (40%),
Disable, 0 (0%), 1 (12%), 2 (26%), 3 (30%),
Long_High Disable
0 (default), 1 (+10%), 2 (+15%),3 (+25%)
4 (-10%), 5 (-15%), 6 (-25%), 7 (-30%)
0 (+/-600ppmx)
2 (+/-1500ppm)
3 (+/-4000ppm)
2 (1320mV), 3 (1360mV), 4 (640mV),
1 (+/-300ppm)
PCI Express,
3 (1350mV), 4 (610mV), 5 (730mV),
5 (760mV), 6 (870mV), 7 (990mV)
Mid_High,
0(1040mV: default), 1(1280mV),
GIGE
Lock
4 (44%), 5 (56%), 6 (80%)
4 (33%), 5 (40%), 6 (53%)
6 (820mV), 7 (940mV)
50, 60, 75, High
50, 75, 5K
AC, DC
AC, DC
Range
50, 2K
Mid_High, Long_Low
Mid_Low, Mid_Med
Long_High Disable
G8B10B, 8bSER
0 (+/-1200ppm)
1 (+/-2000ppm)
2 (+/-2200ppm)
3 (+/-6000ppm)
Long_Med,
10bSER
Unlock
DISABLE
DISABLE
Default
Value
AC
AC
50
50
50
0
0
0
2