LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 525
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-20E-5FN256I
Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r
Datasheets
1.LFE2-12SE-6FN256C.pdf
(389 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFE2-20E-5FN256I.pdf
(4 pages)
4.LFE2-20E-5FN256I.pdf
(769 pages)
Specifications of LFE2-20E-5FN256I
Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457
LFE2-20E-5FN256I
Q6411457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- LFE2-12SE-6FN256C PDF datasheet
- LFE3-35EA-8FN672I PDF datasheet #2
- LFE2-20E-5FN256I PDF datasheet #3
- LFE2-20E-5FN256I PDF datasheet #4
- Current page: 525 of 769
- Download datasheet (18Mb)
June 2010
Introduction
This user’s guide describes the clock resources available in the LatticeECP2™ and LatticeECP2M™ device archi-
tectures. Details are provided for primary clocks, secondary clocks and edge clocks, as well as clock elements
such as PLLs, DLLs, Clock Dividers and more.
The number of PLLs and DLLs for each package can be found in Tables 10-1 and 10-2.
Table 10-1. Number of PLLs and DLLs: LatticeECP2 Family
Table 10-2. Number of PLLs, DLLs and SERDES: LatticeECP2M Family
Clock/Control Distribution Network
The LatticeECP2/M family provides global clock distribution in the form of eight quadrant-based primary clocks and
flexible secondary clocks. The devices also provide two edge clocks on each edge of the device. Other clock
sources include clock input pins, internal nodes, PLLs, DLLs, Slave Delay Lines and Clock Dividers.
© 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
Number of SPLLs
Number of GPLLs
Number of DLLs
Number of DQSDLLs
Number of SPLLs
Number of GPLLs
Number of DLLs
Number of DQSDLLs
SERDES
Device
Device
Standard PLL (Subset of GPLL)
General Purpose PLL
General Purpose DLL
DLL for DDR Applications
Standard PLL (Subset of GPLL)
General Purpose PLL
General Purpose DLL
DLL for DDR Applications
4-Channel Quad SERDES
Description
Description
PLL/DLL Design and Usage Guide
ECP2M-20
ECP2-6
10-1
0
2
2
2
6
2
2
2
1
LatticeECP2/M sysCLOCK
ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
ECP2M-35
0
2
2
2
6
2
2
2
1
0
2
2
2
ECP2M-50
6
2
2
2
2
0
2
2
2
ECP2M-70 ECP2M-100
Technical Note TN1103
6
2
2
2
4
2
2
2
2
tn1103_02.1
6
2
2
2
4
4
2
2
2
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