LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 575

• Manufacturer Part Number: LFE2-20E-5FN256I
• Description: IC FPGA 21KLUTS 193I/O 256FPBGA
• Manufacturer: Lattice
• Series: ECP2r

Specifications of LFE2-20E-5FN256I

• Number Of Logic Elements/cells: 21000
• Number Of Labs/clbs: 2625
• Total Ram Bits: 282624
• Number Of I /o: 193
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-BGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1170; LFE2-20E-5FN256I; Q6411457

July 2011
Introduction
This technical note discusses memory usage for the LatticeECP2™ and LatticeECP2M™ device families. It is
intended to be used by design engineers as a guide for integrating the EBR- (Embedded Block RAM) and PFU-
based memories in this device family using the ispLEVER
The architecture of these devices provides resources for FPGA on-chip memory applications. The sysMEM™ EBR
complements the distributed PFU-based memory. Single-Port RAM, Dual-Port RAM, Pseudo Dual-Port RAM, FIFO
and ROM memories can be constructed using the EBR. LUTs and PFU can implement Distributed Single-Port
RAM, Dual-Port RAM and ROM.
The capabilities of the EBR RAM and PFU RAM are referred to as primitives and are described later in this docu-
ment. Designers can utilize the memory primitives in two ways via the IPexpress™ tool in the ispLEVER software.
The IPexpress GUI allows users to specify the memory type and size required. IPexpress takes this specification
and constructs a netlist to implement the desired memory by using one or more of the memory primitives.
The remainder of this document discusses the use of IPexpress, memory modules and memory primitives.
Memories in LatticeECP2/M Devices
There are two kinds of logic blocks, the Programmable Functional Unit (PFU) and Programmable Functional Unit
without RAM (PFF). The PFU contains the building blocks for logic, arithmetic, RAM, ROM and register functions.
The PFF block contains building blocks for logic, arithmetic and ROM functions. Both PFU and PFF blocks are opti-
mized for flexibility allowing complex designs to be implemented quickly and efficiently. Logic Blocks are arranged
in a two-dimensional array. Only one type of block is used per row.
The LatticeECP2 family of devices contains up to two rows of sysMEM EBR blocks and the LatticeECP2M family of
devices contains up to seven rows of sysMEM EBR blocks. sysMEM EBRs are large, dedicated 18K fast memory
blocks. Each sysMEM block can be configured in a variety of depths and widths of RAM or ROM. In addition,
LatticeECP2/M devices contain up to two rows of sysDSP™ blocks. Each sysDSP block has multipliers and accu-
mulators, which are the building blocks for complex signal processing capabilities
Table 11-1. LatticeECP2/M LUT and Memory Densities
© 2011 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
LUTs (K)
Distributed RAM
(Kbits)
EBR SRAM
Blocks
EBR SRAM
(Kbits)
Device
LUTs
ECP2-6 ECP2-12 ECP2-20 ECP2M-20 ECP2-35 ECP2M-35 ECP2-50 ECP2M-50 ECP2-70 ECP2M-70 ECP2M-100
6K
12
55
6
3
12K
221
12
24
12
276
21
42
15
20K
1217
19
41
66
332
32
65
18
11-1
35K
®
design tool.
2101
114
34
71
LatticeECP2/M Memory
387
48
96
21
50K
4147
101
225
48
1106
136
68
60
Usage Guide
Technical Note TN1104
70K
4534
145
246
67
tn1104_02.0
100K
5308
202
288
95