LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 648

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LFE2-20E-5FN256I

Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r

Specifications of LFE2-20E-5FN256I

Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE2-20E-5FN256I
Quantity:
1 831
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Table 12-10. ODDRXC Port Names
Figure 12-36 shows the Output Register Block of the LatticeECP2 device configured in ODDRXC mode.
Figure 12-36. Output Register Block in ODDRC Mode
Figure 12-37 shows the timing waveform when using the ODDRXC module.
Figure 12-37. ODDRXC Waveform
ODDRX2B
This DDR output module can be used when a gearbox function is required. This primitive inputs four data streams
and muxes them together to generate a single stream of data going to the sysIO buffer.
Latch C0
Reg B0
Reg A0
ECLK
DB
DA
Q
DA
DB
CLK
RST
Q
ECLK
Port Name
DA
DB
XX
XX
XX
XX
XX
XX
P0
N0
I/O
O
I
I
I
I
Data at the negative edge of the clock
Data at the positive edge of the clock
This clock can be connected to the edge clock or to the FPGA clock
Reset signal
DDR data output
P0
N0
P0
P1
N1
A0
B0
N0
N0
ODDRXC
12-30
N1
P1
P1
P2
N2
C0
N1
Definition
N1
P2
N2
P2
N3
P3
High-Speed I/O Interface
N2
N2
P3
N3
P4
N4
P3
LatticeECP2/M
N3
N3
P4
Q
N4
..
..
P4

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