TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 538

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

•
[Restriction]
[Violation]
<Conditions>
[Workaround]
Note on use of the PCI boot function
0x0_1FFF_FFFF (physical address, the area a and b in the figure shown below) is assigned to the PCI
bus, and not 4 Mbyte memory space that is 0x0_1FC0_0000 to 0x0_1FFF_FFFF (physical address, the
area a).
0x0_1FBF_FFFF (physical address, the area b) is accessed after boot, malfunction occurs due to
conflict between PCIC and the other controller such as SDRAMC which assigns this memory space.
There is no problem when the memory space that is 0x0_1C00_0000 to 0x0_1FBF_FFFF (physical
address, the area b) is not accessed after boot.
(physical address) is accessed after boot. When there is no memory space that is 0x0_1C00_0000 to
0x0_1FBF_FFFF (physical address) other than PCIC, this malfunction does not occur.
(G2PPM2MASK) to the following value.
Don’t perform PCI boot in default setting.
When performing PCI boot in the default setting, 64 Mbyte memory space that is 0x0_1C00_0000 to
PCI boot is performed correctly. When the memory space that is 0x0_1C00_0000 to
This malfunciton occurs when the memory space that is 0x0_1C00_0000 to 0x0_1FBF_FFFF
To assign correct memory space, change the value of G2P Memory Space 2 Address Mask Register
Physical address
G2PM2MASK(0xD148)
0x0_1FFF_FFFF
0x0_1FC0_0000
0x0 1FBF FFFF
0x0 1C00 0000
Area a
Area b
23-8
Chapter 23 Notes on Use of TMPR4937
Default value
0x003f_fff0
4 MB
->
64 MB
Change to
0x0003_fff0