TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 9

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

11. Serial I/O Port ....................................................................................................................................................... 11-1
10.5
11.1
11.2
11.3
11.4
10.4.37
10.4.38
10.4.39
10.4.40
10.4.41
10.4.42
10.4.43
10.4.44
10.4.45
10.4.46
10.4.47
10.4.48
10.4.49
10.4.50
10.4.51
10.4.52
10.4.53
10.4.54
10.4.55
10.4.56
10.4.57
10.4.58
10.4.59
10.4.60
10.4.61
10.4.62
10.4.63
10.5.1
10.5.2
10.5.3
10.5.4
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.3.6
11.3.7
11.3.8
11.3.9
11.3.10
11.3.11
11.3.12
11.4.1
11.4.2
11.4.3
11.4.4
PCI Configuration Space Register ............................................................................................................. 10-98
Features ........................................................................................................................................................ 11-1
Block Diagram ............................................................................................................................................. 11-2
Detailed Explanation.................................................................................................................................... 11-3
Registers......................................................................................................................................................11-12
G2P Memory Space 2 Address Mask Register (G2PM2MASK)
G2P I/O Space Address Mask Register (G2PIOMASK)
G2P Memory Space 0 PCI Base Address Register (G2PM0PBASE)
G2P Memory Space 1 PCI Base Address Register (G2PM1PBASE)
G2P Memory Space 2 PCI Base Address Register (G2PM2PBASE)
G2P I/O Space PCI Base Address Register (G2PIOPBASE)
PCI Controller Configuration Register (PCICCFG)
PCI Controller Status Register (PCICSTATUS) 0xD174 ................................................................ 10-74
PCI Controller Interrupt Mask Register (PCICMASK)
P2G Memory Space 0 G-Bus Base Address Register (P2GM0GBASE)
P2G Memory Space 1 G-Bus Base Address Register (P2GM1GBASE)
P2G Memory Space 2 G-Bus Base Address Register (P2GM2GBASE)
P2G I/O Space G-Bus Base Address Register (P2GIOGBASE)
G2P Configuration Address Register(G2PCFGADRS)
G2P Configuration Data Register (G2PCFGDATA)
G2P Interrupt Acknowledge Data Register (G2PINTACK)
G2P Special Cycle Data Register (G2PSPC) 0xD1CC.................................................................... 10-84
Configuration Data 0 Register (PCICDATA0) 0xD1D0.................................................................. 10-85
Configuration Data 1 Register (PCICDATA1) 0xD1D4.................................................................. 10-86
Configuration Data 2 Register (PCICDATA2) 0xD1D8.................................................................. 10-87
Configuration Data 3 Register (PCICDATA3) 0xD1DC ................................................................. 10-88
PDMAC Chain Address Register (PDMCA) 0xD200 .................................................................... 10-89
PDMAC G-Bus Address Register (PDMGA) 0xD208.................................................................... 10-90
PDMAC PCI Bus Address Register (PDMPA) 0xD210 .................................................................. 10-91
PDMAC Count Register (PDMCTR) 0xD218 ................................................................................ 10-92
PDMAC Configuration Register (PDMCFG) 0xD220.................................................................... 10-93
PDMAC Status Register (PDMSTATUS) 0xD228 ........................................................................ 10-95
Capability ID Register (Cap_ID) 0xDC .......................................................................................... 10-99
Next Item Pointer Register (Next_Item_Ptr) 0xDD...................................................................... 10-100
Power Management Capability Register (PMC) 0xDE ................................................................. 10-101
Power Management Control/Status Register (PMCSR)
Overview ........................................................................................................................................... 11-3
Data Format ....................................................................................................................................... 11-3
Serial Clock Generator....................................................................................................................... 11-5
Data Reception................................................................................................................................... 11-7
Data Transmission ............................................................................................................................. 11-7
DMA Transfer.................................................................................................................................... 11-7
Flow Control...................................................................................................................................... 11-8
Reception Data Status........................................................................................................................ 11-8
Reception Time Out ........................................................................................................................... 11-9
Software Reset ................................................................................................................................... 11-9
Error Detection/Interrupt Signaling ..................................................................................................11-10
Multi-Controller System ...................................................................................................................11-11
Line Control Register 0 (SILCR0) 0xF300 (Ch. 0)
Line Control Register 1 (SILCR1) 0xF400 (Ch. 1) ..........................................................................11-13
DMA/Interrupt Control Register 0 (SIDICR0) 0xF304 (Ch. 0)
DMA/Interrupt Control Register 1 (SIDICR1) 0xF404 (Ch. 1)........................................................11-15
DMA/Interrupt Status Register 0 (SIDISR0) 0xF308 (Ch. 0)
DMA/Interrupt Status Register 1 (SIDISR1) 0xF408 (Ch. 1) ..........................................................11-17
Status Change Interrupt Status Register 0 (SISCISR0) 0xF30C (Ch. 0)
Status Change Interrupt Status Register 1 (SISCISR1) 0xF40C (Ch. 1) .......................................11-19
v
0xD170 .................................................... 10-71
0xD1A4 ................................................... 10-82
0xD1A0 .............................................. 10-81
0xD178 ............................................... 10-76
0xE0 ................................................. 10-102
0xD14C ............................................. 10-66
0xD1C8 ........................................ 10-83
0xD168....................................... 10-70
0xD198.................................. 10-80
0xD148................................. 10-65
Table of Contents
0xD150 .......................... 10-67
0xD158 .......................... 10-68
0xD160 .......................... 10-69
0xD180 ..................... 10-77
0xD188 ..................... 10-78
0xD190 ..................... 10-79