SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 102
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 102 of 1465
- Download datasheet (26Mb)
11.12.2.7
11.12.2.8
11.12.3
11.12.3.1
102
102
LDR
LDRNE
STR
STRH
LDRD
STRD
SAM3X/A
SAM3X/A
LDR and STR, register offset
Condition flags
Examples
Syntax
R8, [R10]
R2, [R5, #960]!
R2, [R9,#const-struc]
R3, [R4], #4
R8, R9, [R3, #0x20]
R0, R1, [R8], #-16
These instructions do not change the flags.
Load and Store with register offset.
where:
op
type
cond
Rt
Rn
Rm
LSL #n
• Rt can be SP for word stores only
• Rt must not be PC
• Rn must not be PC
• Rn must be different from Rt and Rt2 in the pre-indexed or post-indexed forms.
op{type}{cond} Rt, [Rn, Rm {, LSL #n}]
LDR
STR
B
SB
H
SH
-
is one of:
Load Register.
Store Register.
is one of:
unsigned byte, zero extend to 32 bits on loads.
signed byte, sign extend to 32 bits (LDR only).
unsigned halfword, zero extend to 32 bits on loads.
signed halfword, sign extend to 32 bits (LDR only).
omit, for word.
is an optional condition code, see
is the register to load or store.
is the register on which the memory address is based.
is a register containing a value to be used as the offset.
is an optional shift, with n in the range 0 to 3.
; Loads R8 from the address in R10.
; Loads (conditionally) R2 from a word
; 960 bytes above the address in R5, and
; increments R5 by 960.
; const-struc is an expression evaluating
; to a constant in the range 0-4095.
; Store R3 as halfword data into address in
; R4, then increment R4 by 4
; Load R8 from a word 32 bytes above the
; address in R3, and load R9 from a word 36
; bytes above the address in R3
; Store R0 to address in R8, and store R1 to
; a word 4 bytes above the address in R8,
; and then decrement R8 by 16.
“Conditional execution” on page
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
96.
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