SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 413

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SAM3A4C

Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
Datasheets
Figure 25-7. Low-power Mode Behavior
25.6.5.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
SDRAMC_A[12:0]
SDCKE
SDCS
SDCK
(input)
DATA
RAS
CAS
Deep Power-down Mode
This mode is selected by programming the LPCB field to 3 in the SDRAMC Low Power Register.
When this mode is activated, all internal voltage generators inside the SDRAM are stopped and
all data is lost.
When this mode is enabled, the application must not access to the SDRAM until a new initializa-
tion sequence is done (See
This is described in
Row n
T
RCD
= 3
col a
Figure
CAS = 2
25-8.
col b
“SDRAM Device Initialization” on page
Dna
col c
Dnb
col d
Dnc
col e
Dnd
col f
Dne
Dnf
406).
SAM3X/A
SAM3X/A
Low Power Mode
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