SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 217

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SAM3A4C

Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
Datasheets
12.4
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Debug and Test Pin Description
Figure 12-3. Application Test Environment Example
Table 12-1.
Note:
Signal Name
NRST
TST
TCK/SWCLK
TDI
TDO/TRACESWO
TMS/SWDIO
JTAGSEL
1. TDO pin is set in input mode when the Cortex-M3 Core is not in debug mode. Thus the internal
pull-up corresponding to this PIO line must be enabled to avoid current consumption due to
floating input.
Debug and Test Signal List
SAM3-based Application Board In Test
Connector
JTAG
Probe
JTAG
Function
Microcontroller Reset
Test Select
Test Clock/Serial Wire Clock
Test Data In
Test Data Out/Trace Asynchronous
Data Out
Test Mode Select/Serial Wire
Input/Output
JTAG Selection
SAM3
Chip n
SWD/JTAG
Reset/Test
Test Adaptor
Chip 2
Chip 1
Tester
Input/Output
Output
Type
Input
Input
Input
Input
Input
(1)
SAM3X/A
SAM3X/A
Active Level
High
Low
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